platforms,targets/lattice_certuspro_nx_evn,lattice_certuspro_nx_vvml: set sysconfig SPI_MASTER mode by default at platform level

This commit is contained in:
Gwenhael Goavec-Merou 2024-07-01 11:06:44 +02:00
parent 40204ac815
commit 1c06988d80
4 changed files with 2 additions and 2 deletions

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@ -136,6 +136,7 @@ class Platform(LatticeNexusPlatform):
def __init__(self, device="LFCPNX", toolchain="radiant", **kwargs):
assert device in ["LFCPNX"]
LatticeNexusPlatform.__init__(self, device + "-100-9LFG672C", _io, _connectors, toolchain=toolchain, **kwargs)
self.add_platform_command("ldc_set_sysconfig {{MASTER_SPI_PORT=SERIAL}}")
# Evaluation mode (with free license)
self.toolchain.set_prj_strategy_opts({"bit_ip_eval": "true"})

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@ -109,6 +109,7 @@ class Platform(LatticeNexusPlatform):
def __init__(self, device="LFCPNX", toolchain="radiant", **kwargs):
assert device in ["LFCPNX"]
LatticeNexusPlatform.__init__(self, device + "-100-9BBG484I", _io, _connectors, toolchain=toolchain, **kwargs)
self.add_platform_command("ldc_set_sysconfig {{MASTER_SPI_PORT=SERIAL}}")
# Evaluation mode (with free license)
self.toolchain.set_prj_strategy_opts({"bit_ip_eval": "true"})

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@ -60,7 +60,6 @@ class BaseSoC(SoCCore):
with_led_chaser = True,
**kwargs):
platform = lattice_certuspro_nx_evn.Platform(toolchain=toolchain)
platform.add_platform_command("ldc_set_sysconfig {{MASTER_SPI_PORT=SERIAL}}")
# CRG --------------------------------------------------------------------------------------
self.crg = _CRG(platform, sys_clk_freq)

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@ -60,7 +60,6 @@ class BaseSoC(SoCCore):
with_led_chaser = True,
**kwargs):
platform = lattice_certuspro_nx_vvml.Platform(toolchain=toolchain)
platform.add_platform_command("ldc_set_sysconfig {{MASTER_SPI_PORT=SERIAL}}")
# CRG --------------------------------------------------------------------------------------
self.crg = _CRG(platform, sys_clk_freq)