diff --git a/litex_boards/platforms/ego1.py b/litex_boards/platforms/ego1.py
index 56af626..379a856 100644
--- a/litex_boards/platforms/ego1.py
+++ b/litex_boards/platforms/ego1.py
@@ -97,9 +97,9 @@ _io = [
 
     # VGA
      ("vga", 0,
-        Subsignal("red",   Pins("F5 C6 C5 B7")),
-        Subsignal("green", Pins("B6 A6 A5 D8")),
-        Subsignal("blue",  Pins("C7 E6 E5 E7")),
+        Subsignal("r",     Pins("F5 C6 C5 B7")),
+        Subsignal("g",     Pins("B6 A6 A5 D8")),
+        Subsignal("b",     Pins("C7 E6 E5 E7")),
         Subsignal("hsync", Pins("D7")),
         Subsignal("vsync", Pins("C4")),
         IOStandard("LVCMOS33")
diff --git a/litex_boards/targets/ego1.py b/litex_boards/targets/ego1.py
index bf4939d..f0bbf75 100755
--- a/litex_boards/targets/ego1.py
+++ b/litex_boards/targets/ego1.py
@@ -19,8 +19,7 @@ from litex.soc.integration.soc import SoCRegion
 from litex.soc.integration.soc_core import *
 from litex.soc.integration.builder import *
 from litex.soc.cores.led import LedChaser
-
-from litevideo.terminal.core import Terminal
+from litex.soc.cores.video import VideoVGAPHY
 
 # CRG ----------------------------------------------------------------------------------------------
 
@@ -39,7 +38,7 @@ class _CRG(Module):
 # BaseSoC ------------------------------------------------------------------------------------------
 
 class BaseSoC(SoCCore):
-    def __init__(self, sys_clk_freq=int(100e6), with_led_chaser=True, with_vga=False, **kwargs):
+    def __init__(self, sys_clk_freq=int(100e6), with_led_chaser=True, with_video_terminal=False, **kwargs):
         platform = ego1.Platform()
 
         # SoCCore ----------------------------------------------------------------------------------
@@ -52,17 +51,9 @@ class BaseSoC(SoCCore):
         self.submodules.crg = _CRG(platform, sys_clk_freq)
 
         # VGA terminal -----------------------------------------------------------------------------
-        if with_vga:
-            self.submodules.terminal = terminal = Terminal()
-            self.bus.add_slave("terminal", self.terminal.bus, region=SoCRegion(origin=0x30000000, size=0x10000))
-            vga_pads = platform.request("vga")
-            self.comb += [
-                vga_pads.vsync.eq(terminal.vsync),
-                vga_pads.hsync.eq(terminal.hsync),
-                vga_pads.red.eq(terminal.red[4:8]),
-                vga_pads.green.eq(terminal.green[4:8]),
-                vga_pads.blue.eq(terminal.blue[4:8])
-            ]
+        if with_video_terminal:
+            self.submodules.videophy = VideoVGAPHY(platform.request("vga"), clock_domain="vga")
+            self.add_video_terminal(phy=self.videophy, timings="640x480@75Hz", clock_domain="vga")
 
         # Leds -------------------------------------------------------------------------------------
         if with_led_chaser:
@@ -75,11 +66,11 @@ class BaseSoC(SoCCore):
 
 def main():
     parser = argparse.ArgumentParser(description="LiteX SoC on EGO1")
-    parser.add_argument("--build",           action="store_true", help="Build bitstream")
-    parser.add_argument("--load",            action="store_true", help="Load bitstream")
-    parser.add_argument("--flash",           action="store_true", help="Flash bitstream")
-    parser.add_argument("--with-vga",        action="store_true", help="Enagle VGA Terminal")
-    parser.add_argument("--sys-clk-freq",    default=100e6,       help="System clock frequency (default: 100MHz)")
+    parser.add_argument("--build",               action="store_true", help="Build bitstream")
+    parser.add_argument("--load",                action="store_true", help="Load bitstream")
+    parser.add_argument("--flash",               action="store_true", help="Flash bitstream")
+    parser.add_argument("--with-video-terminal", action="store_true", help="Enable Video Terminal")
+    parser.add_argument("--sys-clk-freq",        default=100e6,       help="System clock frequency (default: 100MHz)")
 
     builder_args(parser)
     soc_core_args(parser)
@@ -87,8 +78,8 @@ def main():
     args = parser.parse_args()
 
     soc = BaseSoC(
-        sys_clk_freq   = int(float(args.sys_clk_freq)),
-        with_vga       = args.with_vga,
+        sys_clk_freq        = int(float(args.sys_clk_freq)),
+        with_video_terminal = args.with_video_terminal,
         **soc_core_argdict(args)
     )