From 25c28d2c03f5034db7c3a09d2ef0e06083bf8a6c Mon Sep 17 00:00:00 2001 From: Adam Zeloof Date: Sat, 10 Sep 2022 18:16:04 +0100 Subject: [PATCH] fixed issue with default programmer option --- litex_boards/platforms/gsd_butterstick.py | 8 ++++---- litex_boards/targets/gsd_butterstick.py | 7 ++++--- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/litex_boards/platforms/gsd_butterstick.py b/litex_boards/platforms/gsd_butterstick.py index a0334c4..e39da29 100644 --- a/litex_boards/platforms/gsd_butterstick.py +++ b/litex_boards/platforms/gsd_butterstick.py @@ -195,13 +195,13 @@ class Platform(LatticePlatform): connectors = {"1.0": _connectors_r1_0}[revision] LatticePlatform.__init__(self, f"LFE5UM5G-{device}-8BG381C", io, connectors, toolchain=toolchain, **kwargs) - def create_programmer(self, load): - if load == "jtag": + def create_programmer(self, programmer): + if programmer == "jtag": return OpenOCDJTAGProgrammer("openocd_butterstick.cfg") - elif load == "dfu": + elif programmer == "dfu": return DFUProg(vid="1209", pid="5af1", alt=0) else: - print("Could not program board. " + load + " is not a valid argument. Please use 'jtag' or 'dfu'.") + print("Could not program board. " + programmer + " is not a valid argument. Please use 'jtag' or 'dfu'.") def do_finalize(self, fragment): LatticePlatform.do_finalize(self, fragment) diff --git a/litex_boards/targets/gsd_butterstick.py b/litex_boards/targets/gsd_butterstick.py index c0ca17f..1408d86 100755 --- a/litex_boards/targets/gsd_butterstick.py +++ b/litex_boards/targets/gsd_butterstick.py @@ -8,7 +8,7 @@ # SPDX-License-Identifier: BSD-2-Clause # Build/Use: -# ./gsd_butterstick.py --uart-name=crossover --with-etherbone --csr-csv=csr.csv --build --load (jtag / dfu) +# ./gsd_butterstick.py --uart-name=crossover --with-etherbone --csr-csv=csr.csv --build --load --programmer (jtag / dfu) # litex_server --udp # litex_term crossover @@ -155,7 +155,8 @@ def main(): parser = LiteXSoCArgumentParser(description="LiteX SoC on ButterStick") target_group = parser.add_argument_group(title="Target options") target_group.add_argument("--build", action="store_true", help="Build design.") - target_group.add_argument("--load", default="jtag", help="Load bitstream (jtag or dfu).") + target_group.add_argument("--load", action="store_true", help="Load bitstream.") + target_group.add_argument("--programmer", default="jtag", help="Programming interface (jtag or dfu).") target_group.add_argument("--toolchain", default="trellis", help="FPGA toolchain (trellis or diamond).") target_group.add_argument("--sys-clk-freq", default=75e6, help="System clock frequency.") target_group.add_argument("--revision", default="1.0", help="Board Revision (1.0).") @@ -201,7 +202,7 @@ def main(): builder.build(**builder_kargs) if args.load: - prog = soc.platform.create_programmer(args.load) + prog = soc.platform.create_programmer(args.programmer) prog.load_bitstream(builder.get_bitstream_filename(mode="sram")) if __name__ == "__main__":