diff --git a/litex_boards/targets/arduino_mkrvidor4000.py b/litex_boards/targets/arduino_mkrvidor4000.py
index 741a54c..70f6440 100755
--- a/litex_boards/targets/arduino_mkrvidor4000.py
+++ b/litex_boards/targets/arduino_mkrvidor4000.py
@@ -72,8 +72,9 @@ class BaseSoC(SoCCore):
 # Build --------------------------------------------------------------------------------------------
 
 def main():
-    parser = argparse.ArgumentParser(description="LiteX SoC on MKR Vidor 4000")
-    parser.add_argument("--sys-clk-freq",  default=48e6,        help="System clock frequency.")
+    from litex.build.parser import LiteXArgumentParser
+    parser = LiteXArgumentParser(platform=arduino_mkrvidor4000.Platform, description="LiteX SoC on MKR Vidor 4000")
+    parser.add_argument("--sys-clk-freq",  default=48e6, help="System clock frequency.")
     args = parser.parse_args()
 
     soc = BaseSoC(
diff --git a/litex_boards/targets/avnet_aesku40.py b/litex_boards/targets/avnet_aesku40.py
index 5bd0ace..87d139c 100755
--- a/litex_boards/targets/avnet_aesku40.py
+++ b/litex_boards/targets/avnet_aesku40.py
@@ -104,8 +104,9 @@ class BaseSoC(SoCCore):
 # Build --------------------------------------------------------------------------------------------
 
 def main():
-    parser = argparse.ArgumentParser(description="LiteX SoC on AESKU40")
-    parser.add_argument("--sys-clk-freq",  default=125e6,       help="System clock frequency (default: 125MHz)")
+    from litex.build.parser import LiteXArgumentParser
+    parser = LiteXArgumentParser(platform=avnet_aesku40.Platform, description="LiteX SoC on AESKU40")
+    parser.add_argument("--sys-clk-freq", default=125e6, help="System clock frequency (default: 125MHz)")
     args = parser.parse_args()
 
     soc = BaseSoC(
diff --git a/litex_boards/targets/isx_im1283.py b/litex_boards/targets/isx_im1283.py
index e6011ac..3a804bd 100755
--- a/litex_boards/targets/isx_im1283.py
+++ b/litex_boards/targets/isx_im1283.py
@@ -82,7 +82,8 @@ class BaseSoC(SoCCore):
 # Build --------------------------------------------------------------------------------------------
 
 def main():
-    parser = argparse.ArgumentParser(description="LiteX SoC on iM1283")
+    from litex.build.parser import LiteXArgumentParser
+    parser = LiteXArgumentParser(platform=isx_im1283.Platform, description="LiteX SoC on iM1283")
     parser.add_argument("--sys-clk-freq",    default=80e6,                     help="System clock frequency")
     sdopts = parser.add_mutually_exclusive_group()
     sdopts.add_argument("--with-spi-sdcard", action="store_true",              help="Enable SPI-mode SDCard support")
diff --git a/litex_boards/targets/machdyne_krote.py b/litex_boards/targets/machdyne_krote.py
index 9023ec4..b75f740 100755
--- a/litex_boards/targets/machdyne_krote.py
+++ b/litex_boards/targets/machdyne_krote.py
@@ -109,7 +109,8 @@ class BaseSoC(SoCCore):
 # Build --------------------------------------------------------------------------------------------
 
 def main():
-    parser = argparse.ArgumentParser(description="LiteX SoC on Kr\xf6te")
+    from litex.build.parser import LiteXArgumentParser
+    parser = LiteXArgumentParser(platform=machdyne_krote.Platform, description="LiteX SoC on Kr\xf6te")
     parser.add_argument("--bios-flash-offset", default="0x021000",  help="BIOS offset in SPI Flash (default: 0x21000)")
     parser.add_argument("--sys-clk-freq",      default=50e6,        help="System clock frequency (default: 50MHz)")
     parser.add_argument("--with-led-chaser", action="store_true", help="Enable LED Chaser.")