From 36897f46468c2762cb071635dc710b8fd5ae5ee7 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Thu, 14 Oct 2021 09:39:54 +0200
Subject: [PATCH] efinix_trion_t120_bga576: Disable Identifier (crashes design)
 and move no_we, working.

./efinix_trion_t120_bga576_dev_kit.py --build --load

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2021 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS CRC passed (b23a7321)

 Migen git sha1: 7507a2b
 LiteX git sha1: 8316fbf1

--=============== SoC ==================--
CPU:		VexRiscv @ 40MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB


--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex>
---
 .../targets/efinix_trion_t120_bga576_dev_kit.py       | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py b/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py
index 026fb49..a3d2e18 100755
--- a/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py
+++ b/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py
@@ -39,12 +39,13 @@ class BaseSoC(SoCCore):
         platform = efinix_trion_t120_bga576_dev_kit.Platform()
 
         # SoCCore ----------------------------------------------------------------------------------
-        kwargs["integrated_rom_no_we"]  = True # FIXME: Avoid this.
-        kwargs["integrated_sram_no_we"] = True # FIXME: Avoid this.
         SoCCore.__init__(self, platform, sys_clk_freq,
-            ident          = "LiteX SoC on Efinix Trion T120 BGA576 Dev Kit",
-            ident_version  = True,
-            **kwargs)
+            #ident          = "LiteX SoC on Efinix Trion T120 BGA576 Dev Kit", # FIXME: Crash design.
+            #ident_version  = True,
+            integrated_rom_no_we  = True, # FIXME: Avoid this.
+            integrated_sram_no_we = True, # FIXME: Avoid this.
+            **kwargs
+        )
 
         # CRG --------------------------------------------------------------------------------------
         self.submodules.crg = _CRG(platform)