From 40c8e62b09376f3d837b9f729541993c920f0686 Mon Sep 17 00:00:00 2001 From: Hans Baier Date: Tue, 21 Mar 2023 09:25:56 +0700 Subject: [PATCH] use bistream compression on those large devices --- litex_boards/platforms/qmtech_artix7_fbg484.py | 5 +++-- litex_boards/platforms/qmtech_artix7_fgg676.py | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/litex_boards/platforms/qmtech_artix7_fbg484.py b/litex_boards/platforms/qmtech_artix7_fbg484.py index 26b4f36..3be25ac 100644 --- a/litex_boards/platforms/qmtech_artix7_fbg484.py +++ b/litex_boards/platforms/qmtech_artix7_fbg484.py @@ -162,7 +162,8 @@ class Platform(Xilinx7SeriesPlatform): Xilinx7SeriesPlatform.__init__(self, device, io, connectors, toolchain=toolchain) self.toolchain.bitstream_commands = \ - ["set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]"] + ["set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]", + "set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]"] self.toolchain.additional_commands = \ ["write_cfgmem -force -format bin -interface spix4 -size 16 " "-loadbit \"up 0x0 {build_name}.bit\" -file {build_name}.bin"] @@ -178,4 +179,4 @@ class Platform(Xilinx7SeriesPlatform): def do_finalize(self, fragment): Xilinx7SeriesPlatform.do_finalize(self, fragment) - self.add_period_constraint(self.lookup_request("clk50", loose=True), 1e9/50e6) \ No newline at end of file + self.add_period_constraint(self.lookup_request("clk50", loose=True), 1e9/50e6) diff --git a/litex_boards/platforms/qmtech_artix7_fgg676.py b/litex_boards/platforms/qmtech_artix7_fgg676.py index 7afcba2..6a0ce64 100644 --- a/litex_boards/platforms/qmtech_artix7_fgg676.py +++ b/litex_boards/platforms/qmtech_artix7_fgg676.py @@ -162,7 +162,8 @@ class Platform(Xilinx7SeriesPlatform): Xilinx7SeriesPlatform.__init__(self, device, io, connectors, toolchain=toolchain) self.toolchain.bitstream_commands = \ - ["set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]"] + ["set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]", + "set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]"] self.toolchain.additional_commands = \ ["write_cfgmem -force -format bin -interface spix4 -size 16 " "-loadbit \"up 0x0 {build_name}.bit\" -file {build_name}.bin"]