diff --git a/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py b/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py index e9c9b08..d7d8062 100755 --- a/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py +++ b/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py @@ -51,9 +51,6 @@ class BaseSoC(SoCCore): SoCCore.__init__(self, platform, sys_clk_freq, #ident = "LiteX SoC on Efinix Trion T120 BGA576 Dev Kit", # FIXME: Crash design. #ident_version = True, - integrated_rom_no_we = True, # FIXME: Avoid this. - integrated_sram_no_we = True, # FIXME: Avoid this. - integrated_main_ram_no_we = True, # FIXME: Avoid this. **kwargs ) diff --git a/litex_boards/targets/efinix_trion_t20_bga256_dev_kit.py b/litex_boards/targets/efinix_trion_t20_bga256_dev_kit.py index 9d9d379..c1aae48 100755 --- a/litex_boards/targets/efinix_trion_t20_bga256_dev_kit.py +++ b/litex_boards/targets/efinix_trion_t20_bga256_dev_kit.py @@ -49,9 +49,6 @@ class BaseSoC(SoCCore): SoCCore.__init__(self, platform, sys_clk_freq, #ident = "LiteX SoC on Efinix Trion T20 BGA256 Dev Kit", # FIXME: Crash design. #ident_version = True, - integrated_rom_no_we = True, # FIXME: Avoid this. - integrated_sram_no_we = True, # FIXME: Avoid this. - integrated_main_ram_no_we = True, # FIXME: Avoid this. **kwargs ) diff --git a/litex_boards/targets/efinix_xyloni_dev_kit.py b/litex_boards/targets/efinix_xyloni_dev_kit.py index 997564d..f2150a1 100755 --- a/litex_boards/targets/efinix_xyloni_dev_kit.py +++ b/litex_boards/targets/efinix_xyloni_dev_kit.py @@ -60,9 +60,6 @@ class BaseSoC(SoCCore): SoCCore.__init__(self, platform, sys_clk_freq, #ident = "LiteX SoC on Efinix Xyloni Dev Kit", # FIXME: Crash design. #ident_version = True, - integrated_rom_no_we = True, # FIXME: Avoid this. - integrated_sram_no_we = True, # FIXME: Avoid this. - integrated_main_ram_no_we = True, # FIXME: Avoid this. **kwargs) # CRG --------------------------------------------------------------------------------------