From 4e06e5ff9cd8cacc594b74b7387527fb07c1ecd0 Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Wed, 14 Dec 2022 07:47:09 +0100 Subject: [PATCH] targets/xilinx_zybo_z7: adding missing variant parameter to the platform --- litex_boards/targets/xilinx_zybo_z7.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex_boards/targets/xilinx_zybo_z7.py b/litex_boards/targets/xilinx_zybo_z7.py index 09cac66..cbc9bcb 100755 --- a/litex_boards/targets/xilinx_zybo_z7.py +++ b/litex_boards/targets/xilinx_zybo_z7.py @@ -45,7 +45,7 @@ class _CRG(LiteXModule): class BaseSoC(SoCCore): def __init__(self, sys_clk_freq=100e6, variant="z7-10", with_ps7=False, with_led_chaser=True, **kwargs): - platform = digilent_zybo_z7.Platform() + platform = digilent_zybo_z7.Platform(variant=variant) self.builder = None # CRG -------------------------------------------------------------------------------------- use_ps7_clk = (kwargs.get("cpu_type", None) == "zynq7000")