diff --git a/litex_boards/targets/antmicro_artix_dc_scm.py b/litex_boards/targets/antmicro_artix_dc_scm.py
index 609166f..0f9bdc4 100755
--- a/litex_boards/targets/antmicro_artix_dc_scm.py
+++ b/litex_boards/targets/antmicro_artix_dc_scm.py
@@ -101,14 +101,12 @@ class BaseSoC(SoCCore):
             self.submodules.pcie_phy = S7PCIEPHY(platform, platform.request("pcie_x1"),
                 data_width = 128,
                 bar0_size  = 0x20000)
-            self.add_csr("pcie_phy")
             self.add_pcie(phy=self.pcie_phy, ndmas=1)
 
         # Leds -------------------------------------------------------------------------------------
         self.submodules.leds = LedChaser(
             pads         = platform.request_all("user_led"),
             sys_clk_freq = sys_clk_freq)
-        self.add_csr("leds")
 
 # Build --------------------------------------------------------------------------------------------
 
diff --git a/litex_boards/targets/digilent_atlys.py b/litex_boards/targets/digilent_atlys.py
index db2d303..e911ad8 100755
--- a/litex_boards/targets/digilent_atlys.py
+++ b/litex_boards/targets/digilent_atlys.py
@@ -199,7 +199,6 @@ NET "{eth_clocks_tx}" CLOCK_DEDICATED_ROUTE = FALSE;
         self.submodules.leds = LedChaser(
             pads         = platform.request_all("user_led"),
             sys_clk_freq = sys_clk_freq)
-        self.add_csr("leds")
 
 # Build --------------------------------------------------------------------------------------------
 
diff --git a/litex_boards/targets/ego1.py b/litex_boards/targets/ego1.py
index d9291db..42e9825 100755
--- a/litex_boards/targets/ego1.py
+++ b/litex_boards/targets/ego1.py
@@ -54,7 +54,6 @@ class BaseSoC(SoCCore):
             self.submodules.leds = LedChaser(
                 pads         = platform.request_all("user_led"),
                 sys_clk_freq = sys_clk_freq)
-            self.add_csr("leds")
 
 # Build --------------------------------------------------------------------------------------------
 
diff --git a/litex_boards/targets/mnt_rkx7.py b/litex_boards/targets/mnt_rkx7.py
index e7362a1..fed5a7a 100755
--- a/litex_boards/targets/mnt_rkx7.py
+++ b/litex_boards/targets/mnt_rkx7.py
@@ -123,7 +123,6 @@ class BaseSoC(SoCCore):
 
         gpio_signals = platform.request("gpio")
         self.submodules.leds = GPIOOut(gpio_signals)
-        self.add_csr("leds")
 
         # Additional I2C Ports ---------------------------------------------------------------------
         self.submodules.i2c0 = I2CMaster(platform.request("i2c", 0))
diff --git a/litex_boards/targets/trenz_te0725.py b/litex_boards/targets/trenz_te0725.py
index b9f4ab7..d640c71 100755
--- a/litex_boards/targets/trenz_te0725.py
+++ b/litex_boards/targets/trenz_te0725.py
@@ -54,7 +54,6 @@ class BaseSoC(SoCCore):
             self.submodules.leds = LedChaser(
                 pads         = platform.request_all("user_led"),
                 sys_clk_freq = sys_clk_freq)
-            self.add_csr("leds")
 
 # Build --------------------------------------------------------------------------------------------