diff --git a/litex_boards/platforms/xilinx_zcu102.py b/litex_boards/platforms/xilinx_zcu102.py
index 17b2fe3..8e7aa70 100644
--- a/litex_boards/platforms/xilinx_zcu102.py
+++ b/litex_boards/platforms/xilinx_zcu102.py
@@ -13,8 +13,8 @@ from litex.build.xilinx import XilinxUSPPlatform, VivadoProgrammer
 _io = [
     # Clk / Rst
     ("clk125", 0,
-        Subsignal("p", Pins("G21"), IOStandard("LVDS")),
-        Subsignal("n", Pins("F21"), IOStandard("LVDS")),
+        Subsignal("p", Pins("G21"), IOStandard("LVDS_25")),
+        Subsignal("n", Pins("F21"), IOStandard("LVDS_25")),
     ),
     ("clk300", 0,
         Subsignal("p", Pins("AL8"), IOStandard("DIFF_SSTL12_DCI")),