From 17a5d3c130c4c375e34cbc78d35c783001888c4b Mon Sep 17 00:00:00 2001 From: "Lukas F. Hartmann" Date: Tue, 25 Apr 2023 20:27:29 +0200 Subject: [PATCH 1/2] mnt_rkx7: add HDMI terminal, default USB to true --- litex_boards/targets/mnt_rkx7.py | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/litex_boards/targets/mnt_rkx7.py b/litex_boards/targets/mnt_rkx7.py index a7e7867..fcc2363 100755 --- a/litex_boards/targets/mnt_rkx7.py +++ b/litex_boards/targets/mnt_rkx7.py @@ -41,6 +41,7 @@ class _CRG(LiteXModule): self.cd_idelay = ClockDomain() self.cd_dvi = ClockDomain(reset_less=True) self.cd_usb = ClockDomain() + self.cd_hdmi = ClockDomain(reset_less=True) clkin = platform.request("clk100") @@ -55,12 +56,15 @@ class _CRG(LiteXModule): platform.add_false_path_constraints(self.cd_sys.clk, pll.clkin) # USB clock - pll.create_clkout(self.cd_usb, 48e6) + pll.create_clkout(self.cd_usb, int(48e6)) + + # HDMI 640x480 clock + pll.create_clkout(self.cd_hdmi, int(25e6)) self.pll2 = pll2 = S7MMCM(speedgrade=-2) self.comb += pll2.reset.eq(self.rst) pll2.register_clkin(clkin, 100e6) - # DVI/HDMI pixel clock + # DVI pixel clock pll2.create_clkout(self.cd_dvi, 80e6) # display wants 162e6, but we can underclock platform.add_false_path_constraints(self.cd_sys.clk, pll2.clkin) @@ -79,7 +83,7 @@ class BaseSoC(SoCCore): with_ethernet = True, with_etherbone = False, with_spi_flash = True, - with_usb_host = False, + with_usb_host = True, **kwargs): platform = mnt_rkx7.Platform() @@ -161,8 +165,9 @@ class BaseSoC(SoCCore): self.add_video_framebuffer(phy=self.videophy, timings=video_timings, clock_domain="dvi") # HDMI ------------------------------------------------------------------------------------- - # Untested: 2x VideoDVIPHYs and framebuffers in parallel - #self.videophy = VideoDVIPHY(platform.request("hdmi"), clock_domain="dvi") + # Untested: 2x framebuffers in parallel + self.videophy_hdmi = VideoDVIPHY(platform.request("hdmi"), clock_domain="hdmi") + self.add_video_terminal(phy=self.videophy_hdmi, timings="640x480@75Hz", clock_domain="hdmi") # USB Host --------------------------------------------------------------------------------- if with_usb_host: @@ -201,7 +206,7 @@ def main(): parser = LiteXArgumentParser(platform=mnt_rkx7.Platform, description="LiteX SoC on MNT-RKX7.") parser.add_target_argument("--sys-clk-freq", default=100e6, type=float, help="System clock frequency.") parser.add_target_argument("--with-spi-flash", action="store_true", default=True, help="Enable SPI Flash (MMAPed).") - parser.add_target_argument("--with-usb-host", action="store_true", default=False, help="Enable USB host support.") + parser.add_target_argument("--with-usb-host", action="store_true", default=True, help="Enable USB host support.") sdopts = parser.target_group.add_mutually_exclusive_group() sdopts.add_argument("--with-spi-sdcard", action="store_true", help="Enable SPI-mode SDCard support.") sdopts.add_argument("--with-sdcard", action="store_true", default=True, help="Enable SDCard support.") From d160a5ad5d18151424989d3ece508c1bd1e8505e Mon Sep 17 00:00:00 2001 From: "Lukas F. Hartmann" Date: Tue, 25 Apr 2023 20:28:16 +0200 Subject: [PATCH 2/2] mnt_rkx7: swap RGB red/blue channels --- litex_boards/platforms/mnt_rkx7.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/litex_boards/platforms/mnt_rkx7.py b/litex_boards/platforms/mnt_rkx7.py index 578b8ec..8c14edc 100644 --- a/litex_boards/platforms/mnt_rkx7.py +++ b/litex_boards/platforms/mnt_rkx7.py @@ -154,9 +154,9 @@ _io = [ Subsignal("de", Pins("AA15")), Subsignal("hsync", Pins("AB15")), # hsync_n for negative Subsignal("vsync", Pins("AB16")), # vsync_n for negative - Subsignal("b", Pins("AF14 AF15 AE15 AE16 AF17 AE17 AA14 AF18")), # [16:23] + Subsignal("r", Pins("AF14 AF15 AE15 AE16 AF17 AE17 AA14 AF18")), # [16:23] Subsignal("g", Pins("AD15 AE18 AD16 AF19 AC16 AD14 AC17 AC14")), # [8:15] - Subsignal("r", Pins("AB14 Y15 AA17 AA18 Y16 AF20 AD20 AB17")), # [0:7] + Subsignal("b", Pins("AB14 Y15 AA17 AA18 Y16 AF20 AD20 AB17")), # [0:7] IOStandard("LVCMOS18"), Misc("DRIVE=4"), ),