From 6954dd25eb6b5edbf5f175a72fc57e57c03af4a4 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Tue, 23 Nov 2021 15:26:54 +0100 Subject: [PATCH] Set minimal core, since full does not work for some reason --- litex_boards/targets/sipeed_tang_primer.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/litex_boards/targets/sipeed_tang_primer.py b/litex_boards/targets/sipeed_tang_primer.py index df0a981..4e8a996 100755 --- a/litex_boards/targets/sipeed_tang_primer.py +++ b/litex_boards/targets/sipeed_tang_primer.py @@ -43,6 +43,10 @@ class BaseSoC(SoCCore): def __init__(self, sys_clk_freq=int(24e6), with_led_chaser=True, **kwargs): platform = sipeed_tang_primer.Platform() + # Set CPU variant + if kwargs.get("cpu_type", "vexriscv") == "vexriscv": + kwargs["cpu_variant"] = "minimal" + # SoCCore ---------------------------------------------------------------------------------- SoCCore.__init__(self, platform, sys_clk_freq, ident = "LiteX SoC on Tang Primer",