From 75286f8a9b9a92e4775d0d12e3df5ed704133d58 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 10 Mar 2020 14:57:39 +0100 Subject: [PATCH] platforms/zcu104: add missing INTERNAL_VREF on bank 64 (DQ0-31) --- litex_boards/platforms/zcu104.py | 1 + 1 file changed, 1 insertion(+) diff --git a/litex_boards/platforms/zcu104.py b/litex_boards/platforms/zcu104.py index 59c643f..01ce502 100644 --- a/litex_boards/platforms/zcu104.py +++ b/litex_boards/platforms/zcu104.py @@ -142,5 +142,6 @@ class Platform(XilinxPlatform): def do_finalize(self, fragment): XilinxPlatform.do_finalize(self, fragment) + self.add_platform_command("set_property INTERNAL_VREF 0.84 [get_iobanks 64]") self.add_platform_command("set_property INTERNAL_VREF 0.84 [get_iobanks 65]") self.add_platform_command("set_property INTERNAL_VREF 0.84 [get_iobanks 66]")