From 86b9b1b56ce521316c5da274fb3ca095cfef60f7 Mon Sep 17 00:00:00 2001 From: Karol Gugala Date: Thu, 6 Jan 2022 16:50:10 +0100 Subject: [PATCH] antmicro_datacenter: fix clock pin LOC --- litex_boards/platforms/antmicro_datacenter_ddr4_test_board.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/litex_boards/platforms/antmicro_datacenter_ddr4_test_board.py b/litex_boards/platforms/antmicro_datacenter_ddr4_test_board.py index e3c3c1f..4e4809c 100644 --- a/litex_boards/platforms/antmicro_datacenter_ddr4_test_board.py +++ b/litex_boards/platforms/antmicro_datacenter_ddr4_test_board.py @@ -11,8 +11,7 @@ from litex.build.openocd import OpenOCD # IOs ---------------------------------------------------------------------------------------------- _io = [ - # TODO: change clock when assigned to schematic - ("clk100", 0, Pins("AC23"), IOStandard("LVCMOS33")), + ("clk100", 0, Pins("C12"), IOStandard("LVCMOS33")), ("user_led", 0, Pins("D21"), IOStandard("LVCMOS33")), ("user_led", 1, Pins("B20"), IOStandard("LVCMOS33")),