From 570ea1174448c7e81a0356ba33ced2559a6f5b0e Mon Sep 17 00:00:00 2001 From: Guilherme Salustiano Date: Wed, 23 Nov 2022 09:16:50 -0300 Subject: [PATCH 1/2] fix(plataform.basys_3): V_sync is pin R19 Based in https://github.com/Digilent/digilent-xdc/blob/master/Basys-3-Master.xdc#LL129C34-L129C37 --- litex_boards/platforms/digilent_basys3.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex_boards/platforms/digilent_basys3.py b/litex_boards/platforms/digilent_basys3.py index 08d6435..9b3827f 100644 --- a/litex_boards/platforms/digilent_basys3.py +++ b/litex_boards/platforms/digilent_basys3.py @@ -67,7 +67,7 @@ _io = [ # VGA ("vga", 0, Subsignal("hsync_n", Pins("P19")), - Subsignal("vsync_n", Pins("R18")), + Subsignal("vsync_n", Pins("R19")), Subsignal("r", Pins("G19 H19 J19 N19")), Subsignal("g", Pins("J17 H17 G17 D17")), Subsignal("b", Pins("N18 L18 K18 J18")), From 25c40ddda79619fdbdaabcec7545748aaf0d544a Mon Sep 17 00:00:00 2001 From: Guilherme Salustiano Date: Mon, 5 Dec 2022 21:38:56 -0300 Subject: [PATCH 2/2] add gpio to board --- litex_boards/platforms/digilent_basys3.py | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/litex_boards/platforms/digilent_basys3.py b/litex_boards/platforms/digilent_basys3.py index 9b3827f..552e96c 100644 --- a/litex_boards/platforms/digilent_basys3.py +++ b/litex_boards/platforms/digilent_basys3.py @@ -65,21 +65,32 @@ _io = [ ), # VGA - ("vga", 0, + ("vga", 0, Subsignal("hsync_n", Pins("P19")), - Subsignal("vsync_n", Pins("R19")), + Subsignal("vsync_n", Pins("R18")), Subsignal("r", Pins("G19 H19 J19 N19")), Subsignal("g", Pins("J17 H17 G17 D17")), Subsignal("b", Pins("N18 L18 K18 J18")), IOStandard("LVCMOS33") ), - + # USB PS/2 ("usbhost", 0, Subsignal("ps2_clk", Pins("B6")), Subsignal("ps2_data", Pins("A6")), - IOStandard("LVCMOS33")) + IOStandard("LVCMOS33") + ), + + ("gpio", 0, + Subsignal("a", Pins("J1 L2 J2 G2 H1 K2 H2 G3")), + Subsignal("b", Pins("A14 A16 B15 B16 A15 A17 C15 C16")), + Subsignal("c0", Pins("K17")), + Subsignal("c1", Pins("M18")), + Subsignal("c6", Pins("L17")), + Subsignal("c7", Pins("M19")), + Subsignal("xadc", Pins("J3 L3 M2 N2 K3 M3 M1 N1")), + IOStandard("LVCMOS33")) ] # Connectors ---------------------------------------------------------------------------------------