From 874532871f04abc585d5d6662e04e07fc49b1b22 Mon Sep 17 00:00:00 2001 From: Charles-Henri Mousset Date: Sat, 29 Apr 2023 18:28:56 +0200 Subject: [PATCH] [enh] taking advantage of pins directly connected --- litex_boards/platforms/colorlight_i5a_907.py | 41 ++++++++++++++------ litex_boards/targets/colorlight_5a_75x.py | 8 +++- 2 files changed, 36 insertions(+), 13 deletions(-) diff --git a/litex_boards/platforms/colorlight_i5a_907.py b/litex_boards/platforms/colorlight_i5a_907.py index 37eee63..7d93f3a 100644 --- a/litex_boards/platforms/colorlight_i5a_907.py +++ b/litex_boards/platforms/colorlight_i5a_907.py @@ -2,10 +2,14 @@ # This file is part of LiteX-Boards. # # Copyright (c) 2020 Florent Kermarrec +# Copyright (c) 2023 Charles-Henri Mousset # SPDX-License-Identifier: BSD-2-Clause # The Colorlight 5A-75B PCB and IOs have been documented by @miek and @smunaut: # https://github.com/q3k/chubby75/tree/master/5a-75b +# The Colorlight 5A-907 PCB, which is heavily based on the 5A-75B has been documented by @chmouss: +# https://github.com/chmousset/colorlight_reverse + from litex.build.generic_platform import * from litex.build.lattice import LatticeECP5Platform @@ -13,7 +17,7 @@ from litex.build.lattice.programmer import OpenOCDJTAGProgrammer # IOs ---------------------------------------------------------------------------------------------- -_io_v7_0 = [ # Documented by @miek +_io_v7_0 = [ # Documented by @miek and @chmouss # Clk ("clk25", 0, Pins("P6"), IOStandard("LVCMOS33")), @@ -25,8 +29,14 @@ _io_v7_0 = [ # Documented by @miek # Serial ("serial", 0, - Subsignal("tx", Pins("P11")), # led (J19 DATA_LED-) - Subsignal("rx", Pins("M13")), # btn (J19 KEY+) + Subsignal("tx", Pins("P15")), # FAN pin 1 + Subsignal("rx", Pins("L14")), # FAN pin 2 + IOStandard("LVCMOS33") + ), + + ("uartbone", 0, + Subsignal("tx", Pins("F15")), # EXT_VOL pin 1 + Subsignal("rx", Pins("E16")), # EXT_VOL pin 2 IOStandard("LVCMOS33") ), @@ -95,20 +105,29 @@ _io_v7_0 = [ # Documented by @miek ), # USB + # To use the USB: + # shunt R124 and R134 + # remove R107 + # connect on R107's pad towards FPGA to R124 shunt through a 1.5k resistor ("usb", 0, - Subsignal("d_p", Pins("M8")), - Subsignal("d_n", Pins("R2")), - Subsignal("pullup", Pins("P4")), + Subsignal("d_p", Pins("F15")), # EXT_VOL pin 1 + Subsignal("d_n", Pins("E16")), # EXT_VOL pin 2 + Subsignal("pullup", Pins("A12")), # R107's pad towards FPGA IOStandard("LVCMOS33") ), ] -# From https://github.com/q3k/chubby75/blob/master/5a-75b/hardware_V7.0.md +# Documented by @chmouss _connectors_v7_0 = [ - ("j1", "- "), - ("j2", "- "), - ("j3", "- "), - ("j4", "- "), + ("door", "- - P16"), + ("smoke", "- - M14 -"), + ("fan", "- P15 L14"), + ("ext_vol", "- F15 E16"), + # pinout: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 + ("j1", "- L2 K1 F12 J14 B16 - J5 K2 F3 F1 T4 G3 - G2 H3 R5 H5 J4 K3 - R8 G1 K4 C2 P8 E3"), + ("j2", "- L2 K1 F12 J14 B16 - J2 J1 H4 K5 R7 P1 - R1 L5 P7 F2 P4 R2 - N7 M8 M9 T6 M7 R6"), + ("j3", "- L2 K1 F12 J14 B16 - G4 G5 M11 N11 L13 P12 - K15 N12 G13 L16 K16 J15 - G12 J16 J12 H15 F13 G16"), + ("j4", "- L2 K1 F12 J14 B16 - F5 F4 H13 J13 E15 H12 - G14 H14 D16 G15 A15 F16 - F14 A14 E13 B14 E14 A13"), ] diff --git a/litex_boards/targets/colorlight_5a_75x.py b/litex_boards/targets/colorlight_5a_75x.py index 8b4c900..1a95470 100755 --- a/litex_boards/targets/colorlight_5a_75x.py +++ b/litex_boards/targets/colorlight_5a_75x.py @@ -138,6 +138,8 @@ class BaseSoC(SoCCore): # CRG -------------------------------------------------------------------------------------- with_rst = kwargs["uart_name"] not in ["serial", "crossover"] # serial_rx shared with user_btn_n. + if board == "i5a-907": + with_rst = True with_usb_pll = kwargs.get("uart_name", None) == "usb_acm" self.crg = _CRG(platform, sys_clk_freq, use_internal_osc = use_internal_osc, @@ -178,17 +180,19 @@ class BaseSoC(SoCCore): # Leds ------------------------------------------------------------------------------------- # Disable leds when serial is used. - if platform.lookup_request("serial", loose=True) is None and with_led_chaser: + if platform.lookup_request("serial", loose=True) is None and with_led_chaser or board == "i5a-907": self.leds = LedChaser( pads = platform.request_all("user_led_n"), sys_clk_freq = sys_clk_freq) + self.add_uartbone(name="uartbone") + # Build -------------------------------------------------------------------------------------------- def main(): from litex.build.parser import LiteXArgumentParser parser = LiteXArgumentParser(platform=colorlight_5a_75b.Platform, description="LiteX SoC on Colorlight 5A-75X.") - parser.add_target_argument("--board", default="5a-75b", help="Board type (5a-75b or 5a-75e).") + parser.add_target_argument("--board", default="5a-75b", help="Board type (5a-75b, 5a-75e or i5a-907).") parser.add_target_argument("--revision", default="7.0", help="Board revision (6.0, 6.1, 7.0 or 8.0).") parser.add_target_argument("--sys-clk-freq", default=60e6, type=float, help="System clock frequency.") ethopts = parser.target_group.add_mutually_exclusive_group()