From 8df797c71695f221ed32ad96e592b3ab8800d52d Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 29 Jul 2021 19:50:36 +0200 Subject: [PATCH] lattice_ice40up5k_evn: Switch to LiteSPI. --- litex_boards/targets/lattice_ice40up5k_evn.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/litex_boards/targets/lattice_ice40up5k_evn.py b/litex_boards/targets/lattice_ice40up5k_evn.py index feba4fc..ae9e166 100755 --- a/litex_boards/targets/lattice_ice40up5k_evn.py +++ b/litex_boards/targets/lattice_ice40up5k_evn.py @@ -86,8 +86,10 @@ class BaseSoC(SoCCore): self.bus.add_slave("sram", self.spram.bus, SoCRegion(size=128*kB)) # SPI Flash -------------------------------------------------------------------------------- - self.add_spi_flash(mode="1x", dummy_cycles=8) # 4x mode is not possible on this board since WP and HOLD pins are not connected to the FPGA + from litespi.modules import N25Q032A + from litespi.opcodes import SpiNorFlashOpCodes as Codes + self.add_spi_flash(mode="1x", module=N25Q032A(Codes.READ_1_1_1)) # Add ROM linker region -------------------------------------------------------------------- self.bus.add_region("rom", SoCRegion(