From 908539d49f14a966cd4f751edb6728a49034806c Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Fri, 17 Jan 2020 13:15:22 +0100 Subject: [PATCH] targets/nexys4ddr: fix typo --- litex_boards/official/targets/nexys4ddr.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex_boards/official/targets/nexys4ddr.py b/litex_boards/official/targets/nexys4ddr.py index 14a469a..3796bb4 100755 --- a/litex_boards/official/targets/nexys4ddr.py +++ b/litex_boards/official/targets/nexys4ddr.py @@ -79,7 +79,7 @@ class EthernetSoC(BaseSoC): # Ethernet --------------------------------------------------------------------------------- # phy - self.submodules.ethphy = LiteEthPHYMII( + self.submodules.ethphy = LiteEthPHYRMII( clock_pads = self.platform.request("eth_clocks"), pads = self.platform.request("eth")) self.add_csr("ethphy")