From 94b985ac568ee5f8982aa75927d71eb63045e9a4 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 14 Jul 2021 09:55:00 +0200 Subject: [PATCH] trenz_tec0117: Use new integrated reset from GW1NPLL. --- litex_boards/targets/trenz_tec0117.py | 1 - 1 file changed, 1 deletion(-) diff --git a/litex_boards/targets/trenz_tec0117.py b/litex_boards/targets/trenz_tec0117.py index 205f72d..a934638 100755 --- a/litex_boards/targets/trenz_tec0117.py +++ b/litex_boards/targets/trenz_tec0117.py @@ -47,7 +47,6 @@ class _CRG(Module): self.comb += pll.reset.eq(~rst_n) pll.register_clkin(clk100, 100e6) pll.create_clkout(self.cd_sys, sys_clk_freq) - self.comb += self.cd_sys.rst.eq(~rst_n) # FIXME: Move to GW1NPLL and use lock. # BaseSoC ------------------------------------------------------------------------------------------