diff --git a/litex_boards/community/targets/ac701.py b/litex_boards/community/targets/ac701.py
index 20ec80f..f9d7752 100755
--- a/litex_boards/community/targets/ac701.py
+++ b/litex_boards/community/targets/ac701.py
@@ -35,7 +35,7 @@ class _CRG(Module):
         # # #
 
         self.submodules.pll = pll = S7PLL(speedgrade=-1)
-        self.comb += pll.reset.eq(~platform.request("cpu_reset"))
+        self.comb += pll.reset.eq(platform.request("cpu_reset"))
         pll.register_clkin(platform.request("clk200"), 200e6)
         pll.create_clkout(self.cd_sys,       sys_clk_freq)
         pll.create_clkout(self.cd_sys4x,     4*sys_clk_freq)