From 9fea5a7fc6e04b89bfe344b8cbd4c4fe1911f960 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Fri, 26 Mar 2021 21:49:22 +0100
Subject: [PATCH] targets/digilent_nexys_video: Cleanup/Simplify #191.

---
 litex_boards/targets/digilent_nexys_video.py | 15 ++++-----------
 1 file changed, 4 insertions(+), 11 deletions(-)

diff --git a/litex_boards/targets/digilent_nexys_video.py b/litex_boards/targets/digilent_nexys_video.py
index 1473e6f..3f54df5 100755
--- a/litex_boards/targets/digilent_nexys_video.py
+++ b/litex_boards/targets/digilent_nexys_video.py
@@ -124,17 +124,6 @@ class BaseSoC(SoCCore):
             # Core
             self.add_sata(phy=self.sata_phy, mode="read+write")
 
-            vadj_map = {
-                "1.2V": 0,
-                "1.8V": 1,
-                "2.5V": 2,
-                "3.3V": 3,
-            }
-
-            if vadj_map[vadj] != 0:
-                vadj_pads = platform.request_all("vadj")
-                self.comb += vadj_pads.eq(C(vadj_map[vadj]))
-
         # Video ------------------------------------------------------------------------------------
         if with_video_terminal or with_video_framebuffer:
             self.submodules.videophy = VideoS7HDMIPHY(platform.request("hdmi_out"), clock_domain="hdmi")
@@ -148,6 +137,10 @@ class BaseSoC(SoCCore):
             pads         = platform.request_all("user_led"),
             sys_clk_freq = sys_clk_freq)
 
+        # VADJ -------------------------------------------------------------------------------------
+        vadj_map = {"1.2V": 0b00, "1.8V": 0b01, "2.5V": 0b10, "3.3V": 0b11}
+        platform.request_all("vadj").eq(vadj_map[vadj])
+
 # Build --------------------------------------------------------------------------------------------
 
 def main():