From a354f04143bdacb2e3541c6f481421e4bdfb937f Mon Sep 17 00:00:00 2001 From: MV Date: Thu, 9 Feb 2023 15:58:41 +0100 Subject: [PATCH] avoid undefined clocks by moving the derive*-statements to start of the additional constraints list --- litex_boards/platforms/terasic_deca.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/litex_boards/platforms/terasic_deca.py b/litex_boards/platforms/terasic_deca.py index be74bc6..d37780d 100644 --- a/litex_boards/platforms/terasic_deca.py +++ b/litex_boards/platforms/terasic_deca.py @@ -325,5 +325,5 @@ class Platform(AlteraPlatform): AlteraPlatform.do_finalize(self, fragment) self.add_period_constraint(self.lookup_request("clk50", loose=True), 1e9/50e6) # Generate PLL clocsk in STA - self.toolchain.additional_sdc_commands.append("derive_pll_clocks -create_base_clocks -use_net_name") - self.toolchain.additional_sdc_commands.append("derive_clock_uncertainty") + self.toolchain.additional_sdc_commands.insert(0, "derive_pll_clocks -create_base_clocks -use_net_name") + self.toolchain.additional_sdc_commands.insert(0, "derive_clock_uncertainty")