From beccf670e510dca481cabfe6d6a13737e89e4a82 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sat, 11 Jan 2020 10:46:23 +0100 Subject: [PATCH] hadbadge: fix _CRG --- litex_boards/partner/targets/hadbadge.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex_boards/partner/targets/hadbadge.py b/litex_boards/partner/targets/hadbadge.py index 35b9dc5..46bc8a1 100755 --- a/litex_boards/partner/targets/hadbadge.py +++ b/litex_boards/partner/targets/hadbadge.py @@ -40,7 +40,7 @@ class _CRG(Module): pll.register_clkin(clk8, 8e6) pll.create_clkout(self.cd_sys, sys_clk_freq, phase=11) pll.create_clkout(self.cd_sys_ps, sys_clk_freq, phase=20) - self.specials += AsyncResetSynchronizer(self.cd_sys, ~por_done | ~pll.locked) + self.specials += AsyncResetSynchronizer(self.cd_sys, ~pll.locked) # SDRAM clock self.comb += platform.request("sdram_clock").eq(self.cd_sys_ps.clk)