From e71a4940c0a09edb5507c7ba729ae24dd0a4dc65 Mon Sep 17 00:00:00 2001 From: Gabriel Somlo Date: Fri, 15 Jan 2021 12:14:40 -0500 Subject: [PATCH] nexys4ddr: etherbone support --- litex_boards/targets/nexys4ddr.py | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/litex_boards/targets/nexys4ddr.py b/litex_boards/targets/nexys4ddr.py index e925365..1dfda8c 100755 --- a/litex_boards/targets/nexys4ddr.py +++ b/litex_boards/targets/nexys4ddr.py @@ -56,7 +56,7 @@ class _CRG(Module): # BaseSoC ------------------------------------------------------------------------------------------ class BaseSoC(SoCCore): - def __init__(self, sys_clk_freq=int(75e6), with_ethernet=False, with_vga=False, **kwargs): + def __init__(self, sys_clk_freq=int(75e6), with_ethernet=False, with_etherbone=False, with_vga=False, **kwargs): platform = nexys4ddr.Platform() # SoCCore ----------------------------------_----------------------------------------------- @@ -85,13 +85,16 @@ class BaseSoC(SoCCore): l2_cache_reverse = True ) - # Ethernet --------------------------------------------------------------------------------- - if with_ethernet: + # Ethernet / Etherbone --------------------------------------------------------------------- + if with_ethernet or with_etherbone: self.submodules.ethphy = LiteEthPHYRMII( clock_pads = self.platform.request("eth_clocks"), pads = self.platform.request("eth")) self.add_csr("ethphy") - self.add_ethernet(phy=self.ethphy) + if with_ethernet: + self.add_ethernet(phy=self.ethphy) + if with_etherbone: + self.add_etherbone(phy=self.ethphy) # VGA terminal ----------------------------------------------------------------------------- if with_vga: @@ -120,6 +123,7 @@ def main(): parser.add_argument("--load", action="store_true", help="Load bitstream") parser.add_argument("--sys-clk-freq", default=75e6, help="System clock frequency (default: 75MHz)") parser.add_argument("--with-ethernet", action="store_true", help="Enable Ethernet support") + parser.add_argument("--with-etherbone", action="store_true", help="Enable Etherbone support") parser.add_argument("--with-spi-sdcard", action="store_true", help="Enable SPI-mode SDCard support") parser.add_argument("--with-sdcard", action="store_true", help="Enable SDCard support") parser.add_argument("--with-vga", action="store_true", help="Enable VGA support") @@ -127,9 +131,11 @@ def main(): soc_sdram_args(parser) args = parser.parse_args() + assert not (args.with_ethernet and args.with_etherbone) soc = BaseSoC( - sys_clk_freq = int(float(args.sys_clk_freq)), - with_ethernet = args.with_ethernet, + sys_clk_freq = int(float(args.sys_clk_freq)), + with_ethernet = args.with_ethernet, + with_etherbone = args.with_etherbone, **soc_sdram_argdict(args) ) assert not (args.with_spi_sdcard and args.with_sdcard)