From c0e671919d2b718c4922d73c395b6be732f8820c Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 9 Feb 2022 19:10:12 +0100 Subject: [PATCH] sqrl_acorn: Downgrade to SATA Gen1 for now (allow lower sys_clk_freq and enough for current tests). --- litex_boards/targets/sqrl_acorn.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex_boards/targets/sqrl_acorn.py b/litex_boards/targets/sqrl_acorn.py index fb86374..fdb01e3 100755 --- a/litex_boards/targets/sqrl_acorn.py +++ b/litex_boards/targets/sqrl_acorn.py @@ -149,7 +149,7 @@ class BaseSoC(SoCCore): self.submodules.sata_phy = LiteSATAPHY(platform.device, refclk = sata_refclk, pads = platform.request("pcie2sata"), - gen = "gen2", + gen = "gen1", clk_freq = sys_clk_freq, data_width = 16)