From c7404e356f737a58be4527b3ae8de20fce96defd Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sat, 9 May 2020 16:39:17 +0200 Subject: [PATCH] targets/acorn_cle_215: switch to MT41K512M16 (Acorn has a 1GB DDR3 vs 512MB on NiteFury). --- litex_boards/targets/acorn_cle_215.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/litex_boards/targets/acorn_cle_215.py b/litex_boards/targets/acorn_cle_215.py index d7c060e..26a894d 100755 --- a/litex_boards/targets/acorn_cle_215.py +++ b/litex_boards/targets/acorn_cle_215.py @@ -26,7 +26,7 @@ from litex.soc.cores.xadc import XADC from litex.soc.cores.icap import ICAP from litex.soc.cores.led import LedChaser -from litedram.modules import MT41K256M16 +from litedram.modules import MT41K512M16 from litedram.phy import s7ddrphy from litepcie.phy.s7pciephy import S7PCIEPHY @@ -104,7 +104,7 @@ class PCIeSoC(SoCCore): self.add_csr("ddrphy") self.add_sdram("sdram", phy = self.ddrphy, - module = MT41K256M16(sys_clk_freq, "1:4"), + module = MT41K512M16(sys_clk_freq, "1:4"), origin = self.mem_map["main_ram"], size = kwargs.get("max_sdram_size", 0x40000000), l2_cache_size = kwargs.get("l2_size", 8192),