From c960e85d113321da4bf86b79e638b02a95a8b9ed Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 30 Aug 2023 09:59:23 +0200 Subject: [PATCH] targets/efinix: Now rely in LiteX to automatically exclude Tristate IOs. --- litex_boards/targets/efinix_titanium_ti60_f225_dev_kit.py | 3 --- litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py | 3 --- 2 files changed, 6 deletions(-) diff --git a/litex_boards/targets/efinix_titanium_ti60_f225_dev_kit.py b/litex_boards/targets/efinix_titanium_ti60_f225_dev_kit.py index 849d193..4bf6447 100755 --- a/litex_boards/targets/efinix_titanium_ti60_f225_dev_kit.py +++ b/litex_boards/targets/efinix_titanium_ti60_f225_dev_kit.py @@ -91,9 +91,6 @@ class BaseSoC(SoCCore): if with_etherbone: self.add_etherbone(phy=self.ethphy) - # FIXME: Avoid this. - platform.toolchain.excluded_ios.append(platform.lookup_request("eth").mdio) - # Extension board on P2 + External Logic Analyzer. _pmod_ios = [ ("debug", 0, Pins( diff --git a/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py b/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py index 348a249..8911c62 100755 --- a/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py +++ b/litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py @@ -72,7 +72,6 @@ class BaseSoC(SoCCore): from litespi.modules import W25Q128JV from litespi.opcodes import SpiNorFlashOpCodes as Codes self.add_spi_flash(mode="4x", module=W25Q128JV(Codes.READ_1_1_4), with_master=True) - platform.toolchain.excluded_ios.append(platform.lookup_request("spiflash4x").dq) # Leds ------------------------------------------------------------------------------------- if with_led_chaser: @@ -99,8 +98,6 @@ class BaseSoC(SoCCore): clock_pads = platform.request("eth_clocks", eth_phy), pads = platform.request("eth", eth_phy), with_hw_init_reset = False) - # FIXME: Avoid this. - platform.toolchain.excluded_ios.append(platform.lookup_request("eth").mdio) # Use Ethernet RMII PMOD. else: from litex.build.generic_platform import Pins, Subsignal, IOStandard