From c96e7c8fb9f58382af5b24108980c3c612565374 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 31 Dec 2019 18:07:18 +0100 Subject: [PATCH] platforms/pipistrello: cleanup, remove extra stuff specific to litex-buildenv --- .../community/platforms/pipistrello.py | 56 +++++-------------- 1 file changed, 13 insertions(+), 43 deletions(-) diff --git a/litex_boards/community/platforms/pipistrello.py b/litex_boards/community/platforms/pipistrello.py index 7b8b989..2faf4a6 100644 --- a/litex_boards/community/platforms/pipistrello.py +++ b/litex_boards/community/platforms/pipistrello.py @@ -2,6 +2,7 @@ # This file is Copyright (c) 2015 Sebastien Bourdeauducq # This file is Copyright (c) 2015 Yann Sionneau # This file is Copyright (c) 2016-2017 Tim 'mithro' Ansell +# This file is Copyright (c) 2019 Florent Kermarrec # License: BSD from litex.build.generic_platform import * @@ -9,17 +10,19 @@ from litex.build.xilinx import XilinxPlatform from litex.build.xilinx.programmer import XC3SProg from litex.build.openocd import OpenOCD +# IOs ---------------------------------------------------------------------------------------------- + _io = [ + ("clk50", 0, Pins("H17"), IOStandard("LVTTL")), + + ("user_btn", 0, Pins("N14"), IOStandard("LVTTL"), Misc("PULLDOWN")), + ("user_led", 0, Pins("V16"), IOStandard("LVTTL"), Drive(8), Misc("SLEW=QUIETIO")), # green at hdmi ("user_led", 1, Pins("U16"), IOStandard("LVTTL"), Drive(8), Misc("SLEW=QUIETIO")), # red at hdmi ("user_led", 2, Pins("A16"), IOStandard("LVTTL"), Drive(8), Misc("SLEW=QUIETIO")), # green at msd ("user_led", 3, Pins("A15"), IOStandard("LVTTL"), Drive(8), Misc("SLEW=QUIETIO")), # red at msd ("user_led", 4, Pins("A12"), IOStandard("LVTTL"), Drive(8), Misc("SLEW=QUIETIO")), # red at usb - ("user_btn", 0, Pins("N14"), IOStandard("LVTTL"), Misc("PULLDOWN")), - - ("clk50", 0, Pins("H17"), IOStandard("LVTTL")), - ("serial", 0, Subsignal("tx", Pins("A10")), Subsignal("rx", Pins("A11"), Misc("PULLUP")), @@ -124,53 +127,20 @@ _io = [ ) ] +# Connectors --------------------------------------------------------------------------------------- + _connectors = [ ("A", "U18 T17 P17 P16 N16 N17 M16 L15 L17 K15 K17 J16 H15 H18 F18 D18"), ("B", "C18 E18 G18 H16 J18 K18 K16 L18 L16 M18 N18 N15 P15 P18 T18 U17"), ("C", "F17 F16 E16 G16 F15 G14 F14 H14 H13 J13 G13 H12 K14 K13 K12 L12"), ] - -_hdmi_infos = { - "HDMI_OUT0_MNEMONIC": "J4", - "HDMI_OUT0_DESCRIPTION" : ( - " Type A connector, marked as J4.\\r\\n" - ) -} - +# Platform ----------------------------------------------------------------------------------------- class Platform(XilinxPlatform): - name = "pipistrello" - identifier = 0x5049 - default_clk_name = "clk50" - default_clk_period = 20 - hdmi_infos = _hdmi_infos + default_clk_name = "clk50" + default_clk_period = 1e9/50e6 - # Micron N25Q128 (ID 0x0018ba20) - # FIXME: Create a "spi flash module" object in the same way we have SDRAM - # module objects. - spiflash_model = "n25q128" - spiflash_read_dummy_bits = 10 - spiflash_clock_div = 4 - spiflash_total_size = int((128/8)*1024*1024) # 128Mbit - spiflash_page_size = 256 - spiflash_sector_size = 0x10000 - - # The Pipistrello has a XC6SLX45 which bitstream takes up ~12Mbit (1484472 bytes) - # 0x200000 offset (16Mbit) gives plenty of space - gateware_size = 0x200000 - - def __init__(self, programmer="openocd"): + def __init__(self): XilinxPlatform.__init__(self, "xc6slx45-csg324-3", _io, _connectors) self.toolchain.bitgen_opt += " -g Compress -g ConfigRate:6" - self.programmer = programmer - - def create_programmer(self): - proxy="bscan_spi_{}.bit".format(self.device.split('-')[0]) - if self.programmer == "openocd": - return OpenOCD(config="board/pipistrello.cfg", flash_proxy_basename=proxy) - # Alternative programmers - not regularly tested. - elif self.programmer == "xc3sprog": - return XC3SProg("papilio", "bscan_spi_lx45_csg324.bit") - else: - raise ValueError("{} programmer is not supported".format(self.programmer))