From cc53206aff29a1d4e572e7433d5a88d32a2ebadf Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 24 Sep 2020 10:25:55 +0200 Subject: [PATCH] targets/kcu105: create specific cd_eth for ethphy. --- litex_boards/targets/kcu105.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/litex_boards/targets/kcu105.py b/litex_boards/targets/kcu105.py index f8cc379..445f83d 100755 --- a/litex_boards/targets/kcu105.py +++ b/litex_boards/targets/kcu105.py @@ -32,6 +32,7 @@ class _CRG(Module): self.clock_domains.cd_sys4x = ClockDomain(reset_less=True) self.clock_domains.cd_pll4x = ClockDomain(reset_less=True) self.clock_domains.cd_clk200 = ClockDomain() + self.clock_domains.cd_eth = ClockDomain() # # # @@ -40,6 +41,7 @@ class _CRG(Module): pll.register_clkin(platform.request("clk125"), 125e6) pll.create_clkout(self.cd_pll4x, sys_clk_freq*4, buf=None, with_reset=False) pll.create_clkout(self.cd_clk200, 200e6, with_reset=False) + pll.create_clkout(self.cd_eth, 200e6) self.specials += [ Instance("BUFGCE_DIV", name="main_bufgce_div", @@ -87,7 +89,7 @@ class BaseSoC(SoCCore): # Ethernet / Etherbone --------------------------------------------------------------------- if with_ethernet or with_etherbone: - self.submodules.ethphy = KU_1000BASEX(self.crg.cd_clk200.clk, + self.submodules.ethphy = KU_1000BASEX(self.crg.cd_eth.clk, data_pads = self.platform.request("sfp", 0), sys_clk_freq = self.clk_freq) self.add_csr("ethphy")