From e27d8c958ee7472421d275d4850719c1927e0142 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <uwu@icenowy.me>
Date: Sun, 13 Nov 2022 17:30:07 +0800
Subject: [PATCH] isx_im1283: add jtagbone support

Add necessary script snippets for enabling jtagbone in the command line.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
 litex_boards/targets/isx_im1283.py | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/litex_boards/targets/isx_im1283.py b/litex_boards/targets/isx_im1283.py
index 1d5c349..fa3a805 100755
--- a/litex_boards/targets/isx_im1283.py
+++ b/litex_boards/targets/isx_im1283.py
@@ -49,7 +49,7 @@ class _CRG(LiteXModule):
 # BaseSoC ------------------------------------------------------------------------------------------
 
 class BaseSoC(SoCCore):
-    def __init__(self, sys_clk_freq=80e6, with_led_chaser=True, **kwargs):
+    def __init__(self, sys_clk_freq=80e6, with_led_chaser=True, with_jtagbone=True, **kwargs):
         platform = isx_im1283.Platform()
 
         # SoCCore ----------------------------------------------------------------------------------
@@ -60,6 +60,10 @@ class BaseSoC(SoCCore):
         # CRG --------------------------------------------------------------------------------------
         self.crg = _CRG(platform, sys_clk_freq)
 
+        # Jtagbone ---------------------------------------------------------------------------------
+        if with_jtagbone:
+            self.add_jtagbone()
+
         # DDR3 SDRAM -------------------------------------------------------------------------------
         if not self.integrated_main_ram_size:
             self.ddrphy = s7ddrphy.A7DDRPHY(platform.request("ddram"),
@@ -84,6 +88,7 @@ def main():
     from litex.build.parser import LiteXArgumentParser
     parser = LiteXArgumentParser(platform=isx_im1283.Platform, description="LiteX SoC on iM1283.")
     parser.add_argument("--sys-clk-freq", default=80e6, type=float, help="System clock frequency.")
+    parser.add_target_argument("--with-jtagbone", action="store_true", help="Enable Jtagbone support.")
     sdopts = parser.add_mutually_exclusive_group()
     sdopts.add_argument("--with-spi-sdcard", action="store_true", help="Enable SPI-mode SDCard support.")
     sdopts.add_argument("--with-sdcard",     action="store_true", help="Enable SDCard support.")
@@ -91,6 +96,7 @@ def main():
 
     soc = BaseSoC(
         sys_clk_freq = args.sys_clk_freq,
+        with_jtagbone = args.with_jtagbone,
         **parser.soc_argdict
     )
     if args.with_spi_sdcard: