From eba70377b79d0f444249dded1869a77cd74e1310 Mon Sep 17 00:00:00 2001
From: Pepijn de Vos <pepijndevos@gmail.com>
Date: Tue, 4 Aug 2020 11:07:30 +0200
Subject: [PATCH] add optional OLED peripheral to ULX3S target

---
 litex_boards/platforms/ulx3s.py | 11 +++++++++++
 litex_boards/targets/ulx3s.py   | 20 ++++++++++++++++++++
 2 files changed, 31 insertions(+)

diff --git a/litex_boards/platforms/ulx3s.py b/litex_boards/platforms/ulx3s.py
index ed82b71..28b92f6 100644
--- a/litex_boards/platforms/ulx3s.py
+++ b/litex_boards/platforms/ulx3s.py
@@ -100,6 +100,17 @@ _io = [
         Subsignal("pullup", Pins("B12 C12")),
         IOStandard("LVCMOS33")
     ),
+    ("oled_spi", 0,
+        Subsignal("clk",  Pins("P4")),
+        Subsignal("mosi", Pins("P3")),
+        IOStandard("LVCMOS33"),
+    ),
+    ("oled_ctl", 0,
+        Subsignal("dc",   Pins("P1")),
+        Subsignal("resn", Pins("P2")),
+        Subsignal("csn",  Pins("N2")),
+        IOStandard("LVCMOS33"),
+    ),
 ]
 
 # Platform -----------------------------------------------------------------------------------------
diff --git a/litex_boards/targets/ulx3s.py b/litex_boards/targets/ulx3s.py
index 58e3c64..831f60c 100755
--- a/litex_boards/targets/ulx3s.py
+++ b/litex_boards/targets/ulx3s.py
@@ -22,6 +22,8 @@ from litex.soc.integration.soc_core import *
 from litex.soc.integration.soc_sdram import *
 from litex.soc.integration.builder import *
 from litex.soc.cores.led import LedChaser
+from litex.soc.cores.spi import SPIMaster
+from litex.soc.cores.gpio import GPIOOut
 
 from litedram import modules as litedram_modules
 from litedram.phy import GENSDRPHY, HalfRateGENSDRPHY
@@ -109,6 +111,20 @@ class BaseSoC(SoCCore):
             sys_clk_freq = sys_clk_freq)
         self.add_csr("leds")
 
+    def add_oled(self):
+        pads = self.platform.request("oled_spi")
+        pads.miso = Signal()
+        oled = SPIMaster(pads, 8, self.sys_clk_freq, 8e6)
+        oled.add_clk_divider()
+        self.submodules.oled_spi = oled
+        self.add_csr("oled_spi")
+
+        ctl_pads = self.platform.request("oled_ctl")
+        oled_ctl = GPIOOut(ctl_pads)
+        self.submodules.oled_ctl = oled_ctl
+        self.add_csr("oled_ctl")
+
+
 # Build --------------------------------------------------------------------------------------------
 
 def main():
@@ -121,6 +137,7 @@ def main():
     parser.add_argument("--sdram-module", default="MT48LC16M16",  help="SDRAM module: MT48LC16M16, AS4C32M16 or AS4C16M16 (default=MT48LC16M16)")
     parser.add_argument("--with-spi-sdcard", action="store_true", help="Enable SPI-mode SDCard support")
     parser.add_argument("--with-sdcard", action="store_true",     help="Enable SDCard support")
+    parser.add_argument("--with-oled", action="store_true",     help="Enable SDD1331 OLED support")
     parser.add_argument("--sdram-rate",  default="1:1", help="SDRAM Rate 1:1 Full Rate (default), 1:2 Half Rate")
     builder_args(parser)
     soc_sdram_args(parser)
@@ -137,6 +154,9 @@ def main():
         soc.add_spi_sdcard()
     if args.with_sdcard:
         soc.add_sdcard()
+    if args.with_oled:
+        soc.add_oled()
+
     builder = Builder(soc, **builder_argdict(args))
     builder_kargs = trellis_argdict(args) if args.toolchain == "trellis" else {}
     builder.build(**builder_kargs, run=args.build)