diff --git a/litex_boards/platforms/xcu1525.py b/litex_boards/platforms/xcu1525.py index 036d18d..6f8b2a3 100644 --- a/litex_boards/platforms/xcu1525.py +++ b/litex_boards/platforms/xcu1525.py @@ -138,27 +138,27 @@ _io = [ Subsignal("clk_n", Pins("AU25"), IOStandard("DIFF_SSTL12_DCI")), Subsignal("clk_p", Pins("AT25"), IOStandard("DIFF_SSTL12_DCI")), Subsignal("cs_n", Pins("AV23"), IOStandard("SSTL12_DCI")), - Subsignal("dm", Pins("BE8 AY13 BA10 AN14 BE15 BB14 AW16 AM17"), + Subsignal("dm", Pins("BE8 BE15 BE22 BA10 AY13 BB14 AN14 AW16"), IOStandard("POD12_DCI")), Subsignal("dq", Pins( - " BD9 BD7 BC7 BD8 BD10 BE10 BE7 BF7", - "AU13 AV13 AW13 AW14 AU14 AY11 AV14 BA11", - "BA12 BB12 BA13 BA14 BC9 BB9 BA7 BA8", - "AN13 AR13 AM13 AP13 AM14 AR15 AL14 AT15", - "BE13 BD14 BF12 BD13 BD15 BD16 BF14 BF13", - "AY17 BA17 AY18 BA18 BA15 BB15 BC11 BD11", - "AV16 AV17 AU16 AU17 BB17 BB16 AT18 AT17", - "AM15 AL15 AN17 AN16 AR18 AP18 AL17 AL16"), + " BC7 BD7 BD8 BD9 BF7 BE7 BD10 BE10", + "BF12 BE13 BD14 BD13 BF14 BF13 BD16 BD15", + "BF25 BE25 BF24 BD25 BC23 BD23 BF23 BE23", + "BA14 BA13 BA12 BB12 BC9 BB9 BA7 BA8", + "AU13 AW14 AW13 AV13 AU14 BA11 AY11 AV14", + "BA18 BA17 AY18 AY17 BD11 BC11 BA15 BB15", + "AR13 AP13 AN13 AM13 AT15 AR15 AM14 AL14", + "AV16 AV17 AU17 AU16 BB17 BB16 AT17 AT18"), IOStandard("POD12_DCI"), Misc("OUTPUT_IMPEDANCE=RDRV_40_40"), Misc("PRE_EMPHASIS=RDRV_240"), Misc("EQUALIZATION=EQ_LEVEL2")), - Subsignal("dqs_n", Pins("BF9 AY15 BB10 AT13 BE11 BC12 AW18 AR16"), + Subsignal("dqs_n", Pins("BF9 BE11 BD24 BB10 AY15 BC12 AT13 AW18"), IOStandard("DIFF_POD12"), Misc("OUTPUT_IMPEDANCE=RDRV_40_40"), Misc("PRE_EMPHASIS=RDRV_240"), Misc("EQUALIZATION=EQ_LEVEL2")), - Subsignal("dqs_p", Pins("BF10 AW15 BB11 AT14 BE12 BC13 AV18 AP16"), + Subsignal("dqs_p", Pins("BF10 BE12 BC24 BB11 AW15 BC13 AT14 AV18"), IOStandard("DIFF_POD12"), Misc("OUTPUT_IMPEDANCE=RDRV_40_40"), Misc("PRE_EMPHASIS=RDRV_240"), @@ -167,6 +167,7 @@ _io = [ Subsignal("reset_n", Pins("AR17"), IOStandard("LVCMOS12")), Misc("SLEW=FAST") ), + ("ddram", 2, Subsignal("a", Pins( "L29 A33 C33 J29 H31 G31 C32 B32", @@ -182,27 +183,27 @@ _io = [ Subsignal("clk_n", Pins("B34"), IOStandard("DIFF_SSTL12_DCI")), Subsignal("clk_p", Pins("C34"), IOStandard("DIFF_SSTL12_DCI")), Subsignal("cs_n", Pins("B35"), IOStandard("SSTL12_DCI")), - Subsignal("dm", Pins("R28 M27 H26 C29 G37 T30 M34 H33"), + Subsignal("dm", Pins("T30 M27 R28 H26 C37 H33 G37 M34"), IOStandard("POD12_DCI")), Subsignal("dq", Pins( - "R25 P25 M25 L25 P26 R26 N27 N28", - "J28 H29 H28 G29 K25 L27 K26 K27", - "F27 E27 E28 D28 G27 G26 F28 F29", - "D26 C26 B27 B26 A29 A30 C27 C28", - "F35 E38 D38 E35 E36 E37 F38 G38", - "P30 R30 P29 N29 L32 M32 P31 N32", - "J35 K35 L33 K33 J34 J33 N34 P34", - "H36 G36 H37 J36 K37 K38 G35 G34"), + "P29 P30 R30 N29 N32 M32 P31 L32", + "H29 G29 J28 H28 K27 L27 K26 K25", + "P25 R25 L25 M25 P26 R26 N27 N28", + "F27 D28 E27 E28 G26 F29 G27 F28", + "A38 A37 B37 C36 B40 C39 A40 D39", + "G36 H36 H37 J36 G34 G35 K37 K38", + "E38 D38 E35 F35 E36 E37 F38 G38", + "K35 J35 K33 L33 J33 J34 N34 P34"), IOStandard("POD12_DCI"), Misc("OUTPUT_IMPEDANCE=RDRV_40_40"), Misc("PRE_EMPHASIS=RDRV_240"), Misc("EQUALIZATION=EQ_LEVEL2")), - Subsignal("dqs_n", Pins("M26 J26 D30 A28 E40 M31 L36 H38"), + Subsignal("dqs_n", Pins("M31 J26 M26 D30 A39 H38 E40 L36"), IOStandard("DIFF_POD12"), Misc("OUTPUT_IMPEDANCE=RDRV_40_40"), Misc("PRE_EMPHASIS=RDRV_240"), Misc("EQUALIZATION=EQ_LEVEL2")), - Subsignal("dqs_p", Pins("N26 J25 D29 A27 E39 N31 L35 J38"), + Subsignal("dqs_p", Pins("N31 J25 N26 D29 B39 J38 E39 L35"), IOStandard("DIFF_POD12"), Misc("OUTPUT_IMPEDANCE=RDRV_40_40"), Misc("PRE_EMPHASIS=RDRV_240"), @@ -211,6 +212,7 @@ _io = [ Subsignal("reset_n", Pins("D36"), IOStandard("LVCMOS12")), Misc("SLEW=FAST") ), + ("ddram", 3, Subsignal("a", Pins( "K15 B15 F14 A15 C14 A14 B14 E13", @@ -226,27 +228,27 @@ _io = [ Subsignal("clk_n", Pins("L13"), IOStandard("DIFF_SSTL12_DCI")), Subsignal("clk_p", Pins("L14"), IOStandard("DIFF_SSTL12_DCI")), Subsignal("cs_n", Pins("B16"), IOStandard("SSTL12_DCI")), - Subsignal("dm", Pins("N22 M22 K18 N17 D24 B19 H19 H23"), + Subsignal("dm", Pins("T13 N17 D24 B19 H19 H23 M22 N22"), IOStandard("POD12_DCI")), Subsignal("dq", Pins( - "P24 N24 T24 R23 N23 P21 P23 R21", - "J24 J23 H24 G24 L24 L23 K22 K21", - "G20 H17 F19 G17 J20 L19 L18 J19", - "M19 M20 R18 R17 R20 T20 N18 N19", - "A23 A22 B24 B25 B22 C22 C24 C23", - "C19 C18 C21 B21 A18 A17 A20 B20", - "E17 F20 E18 E20 D19 D20 H18 J18", - "F22 E22 G22 G21 F24 E25 F25 G25"), + "M16 N16 N14 N13 R15 T15 P13 P14", + "R17 R18 M20 M19 N18 N19 R20 T20", + "B24 A23 A22 B25 C24 C23 C22 B22", + "C18 C19 C21 B21 A17 A18 B20 A20", + "E18 E17 E20 F20 D19 H18 D20 J18", + "G21 E22 G22 F22 G25 F24 E25 F25", + "J24 G24 J23 H24 L23 K21 L24 K22", + "P24 N24 R23 T24 N23 P21 P23 R21"), IOStandard("POD12_DCI"), Misc("OUTPUT_IMPEDANCE=RDRV_40_40"), Misc("PRE_EMPHASIS=RDRV_240"), Misc("EQUALIZATION=EQ_LEVEL2")), - Subsignal("dqs_n", Pins("R22 H21 K20 P18 A24 B17 F17 E23"), + Subsignal("dqs_n", Pins("P15 P18 A24 B17 F17 E23 H21 R22"), IOStandard("DIFF_POD12"), Misc("OUTPUT_IMPEDANCE=RDRV_40_40"), Misc("PRE_EMPHASIS=RDRV_240"), Misc("EQUALIZATION=EQ_LEVEL2")), - Subsignal("dqs_p", Pins("T22 J21 L20 P19 A25 C17 F18 F23"), + Subsignal("dqs_p", Pins("R16 P19 A25 C17 F18 F23 J21 T22"), IOStandard("DIFF_POD12"), Misc("OUTPUT_IMPEDANCE=RDRV_40_40"), Misc("PRE_EMPHASIS=RDRV_240"),