From ee28d7b5ec1e0bcbeacc342c82cf539a135fbeb3 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 4 Aug 2020 12:31:15 +0200 Subject: [PATCH] targets/ulx3s/add_oled: simplify. --- litex_boards/targets/ulx3s.py | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/litex_boards/targets/ulx3s.py b/litex_boards/targets/ulx3s.py index 831f60c..105e09e 100755 --- a/litex_boards/targets/ulx3s.py +++ b/litex_boards/targets/ulx3s.py @@ -114,17 +114,13 @@ class BaseSoC(SoCCore): def add_oled(self): pads = self.platform.request("oled_spi") pads.miso = Signal() - oled = SPIMaster(pads, 8, self.sys_clk_freq, 8e6) - oled.add_clk_divider() - self.submodules.oled_spi = oled + self.submodules.oled_spi = SPIMaster(pads, 8, self.sys_clk_freq, 8e6) + self.oled_spi.add_clk_divider() self.add_csr("oled_spi") - ctl_pads = self.platform.request("oled_ctl") - oled_ctl = GPIOOut(ctl_pads) - self.submodules.oled_ctl = oled_ctl + self.submodules.oled_ctl = GPIOOut(self.platform.request("oled_ctl")) self.add_csr("oled_ctl") - # Build -------------------------------------------------------------------------------------------- def main():