From f7ee3fa4543db681f87e9afab8da8a81e07f1f82 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 27 Apr 2021 19:32:03 +0200 Subject: [PATCH] sds1104xe: Framebuffer fixes. --- litex_boards/platforms/siglent_sds1104xe.py | 4 ++-- litex_boards/targets/siglent_sds1104xe.py | 7 ++++--- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/litex_boards/platforms/siglent_sds1104xe.py b/litex_boards/platforms/siglent_sds1104xe.py index d015326..bdeaba3 100644 --- a/litex_boards/platforms/siglent_sds1104xe.py +++ b/litex_boards/platforms/siglent_sds1104xe.py @@ -39,9 +39,9 @@ _io = [ # Documented by https://github.com/360nosc0pe project. Subsignal("clk", Pins("D20")), Subsignal("vsync", Pins("A21")), Subsignal("hsync", Pins("A22")), - Subsignal("r", Pins("G22 F22 F21 F19 F18 F17")), + Subsignal("r", Pins("D22 D21 C22 C20 B22 B21")), Subsignal("g", Pins("F16 E21 E20 E19 E18 E16")), - Subsignal("b", Pins("D22 D21 C22 C20 B22 B21")), + Subsignal("b", Pins("G22 F22 F21 F19 F18 F17")), IOStandard("LVCMOS33"), ), diff --git a/litex_boards/targets/siglent_sds1104xe.py b/litex_boards/targets/siglent_sds1104xe.py index 56e8ae8..dbfafe1 100755 --- a/litex_boards/targets/siglent_sds1104xe.py +++ b/litex_boards/targets/siglent_sds1104xe.py @@ -88,9 +88,10 @@ class BaseSoC(SoCCore): nphases = 4, sys_clk_freq = sys_clk_freq) self.add_sdram("sdram", - phy = self.ddrphy, - module = MT41K64M16(sys_clk_freq, "1:4"), - l2_cache_size = kwargs.get("l2_size", 8192) + phy = self.ddrphy, + module = MT41K64M16(sys_clk_freq, "1:4"), + l2_cache_size = kwargs.get("l2_size", 8192), + l2_cache_reverse = False, ) # Etherbone --------------------------------------------------------------------------------