diff --git a/litex_boards/platforms/qmtech_xc7k325t.py b/litex_boards/platforms/qmtech_xc7k325t.py
index afb0230..4da3851 100644
--- a/litex_boards/platforms/qmtech_xc7k325t.py
+++ b/litex_boards/platforms/qmtech_xc7k325t.py
@@ -16,6 +16,10 @@ _io = [
     # Clk / Rst
     ("clk50", 0, Pins("F22"), IOStandard("LVCMOS33")),
 
+    # Buttons
+    ("user_btn_n", 0, Pins("AF9"),   IOStandard("LVCMOS33")),
+    ("user_btn_n", 1, Pins("AF10"),  IOStandard("LVCMOS33")),
+
     # The core board does not have a USB serial on it,
     # so you will have to attach an USB to serial adapter
     # on these pins
@@ -140,13 +144,11 @@ class Platform(XilinxPlatform):
     core_resources_daughterboard = [
         ("onboard_led_1", 0, Pins("J26"), IOStandard("LVCMOS33")),
         ("onboard_led_2", 0, Pins("H26"), IOStandard("LVCMOS33")),
-        ("cpu_reset", 0, Pins("AD21"), IOStandard("LVCMOS33")),
     ]
 
     core_resources_standalone = [
         ("user_led", 0, Pins("J26"), IOStandard("LVCMOS33")),
         ("user_led", 1, Pins("H26"), IOStandard("LVCMOS33")),
-        ("cpu_reset", 0, Pins("AD21"), IOStandard("LVCMOS33")),
     ]
 
     def __init__(self, toolchain="vivado", with_daughterboard=False):
diff --git a/litex_boards/targets/qmtech_xc7k325t.py b/litex_boards/targets/qmtech_xc7k325t.py
index 7cd1683..ebe201f 100755
--- a/litex_boards/targets/qmtech_xc7k325t.py
+++ b/litex_boards/targets/qmtech_xc7k325t.py
@@ -45,7 +45,7 @@ class _CRG(Module):
         # # #
 
         self.submodules.pll = pll = S7PLL(speedgrade=-1)
-        reset_button = platform.request("cpu_reset")
+        reset_button = platform.request("user_btn_n", 0)
         self.comb += pll.reset.eq(~reset_button | self.rst)
 
         pll.register_clkin(platform.request("clk50"), 50e6)