Hardware
/
litex-boards
mirror of https://github.com/litex-hub/litex-boards.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
2,252 Commits 9 Branches 14 Tags 11 MiB
Commit Graph

2252 Commits

Author SHA1 Message Date
Florent Kermarrec 041c1607ce platforms/sqrl_acorn: Add automatic FTDI Chip detection, add OpenFPGALoader suppport (and switch to it by default), remove VivadoProgrammer support. 2024-11-21 08:40:03 +01:00
enjoy-digital fcb83fa375
Merge pull request #621 from Philip-K/master 
Add support for S7 Mini (TE0890).
 2024-11-16 18:40:34 +01:00
enjoy-digital e97421fbfe
Merge pull request #619 from Dolu1990/ti375_c529 
efinix_ti375_c529_dev_kit now support vexii ethernet
 2024-11-16 18:39:32 +01:00
enjoy-digital 49c6c83378
Merge branch 'master' into ti375_c529 2024-11-16 18:39:17 +01:00
enjoy-digital 0e77cdf3c8
Merge pull request #616 from maass-hamburg/efinix_reset_pulse 
efinix: fix reset
 2024-11-16 18:37:10 +01:00
Phil Kirkpatrick a7d4422735 Add support for S7 Mini (TE0890). 2024-11-09 17:12:11 +01:00
Gwenhael Goavec-Merou 15ad3ab341 platforms/limesdr_mini_v2.py: commented spiflash clk pad. Must be used via USRMCLK. Automatically done by LiteSPI 2024-11-09 07:20:51 +01:00
Gwenhael Goavec-Merou 3fa0f6861e
Merge pull request #620 from oleg-sin/master 
Update sipeed_tang_nano_4k.py
 2024-11-08 12:06:42 +01:00
Oleg Libin eb43cd3ca9
Update sipeed_tang_nano_4k.py 
replace kB to KILOBYTE
 2024-11-08 15:54:00 +05:00
Gwenhael Goavec-Merou 3b8c55802f platforms/limesdr_mini_v2.py: fixed SPI Flash pinout MOSI <-> MISO 2024-11-06 16:58:11 +01:00
Dolu1990 4c61bac2db efinix_ti375_c529_dev_kit now support vexii ethernet 2024-11-01 09:33:42 +01:00
enjoy-digital 22ac6cb201
Merge pull request #617 from trabucayre/zcu102_sfp_pinout 
platforms/xilinx_zcu102.py: Add all SFP connectors
 2024-10-10 08:57:56 +02:00
Gwenhael Goavec-Merou 0eabebfb05 platforms/xilinx_zcu102.py: Add all SFP connectors 2024-10-10 07:34:57 +02:00
Fin Maaß 362a28b72a
efinix: fix reset 
fix reset on all efinix boards.
To reset the PLL a pulse is needed, which
has to be driven by a clock that is
not generated by the PLL.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
 2024-10-08 13:51:09 +02:00
Fin Maaß 88f7d5f019
finix_trion_t20_bga256_dev_kit: fix ClockSignal 
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
 2024-10-08 13:27:59 +02:00
Gwenhael Goavec-Merou 77cb9a5c17
Merge pull request #615 from machdyne/master 
add support for Mozart MX2
 2024-10-05 08:57:55 +02:00
inc 399f10fdf9 add support for Mozart MX2 2024-10-05 08:16:18 +02:00
Gwenhael Goavec-Merou 3742a25233
Merge pull request #614 from pepijndevos/tec0117apicula 
Update tec0117 to work with Apicula
 2024-10-05 07:05:50 +02:00
Pepijn de Vos 9d68972fa8 Update tec0117 to work with Apicula 2024-10-04 15:25:39 +02:00
Florent Kermarrec 7f3ee12c3d setup.py: 2024.08 release. 2024-09-27 09:37:28 +02:00
Florent Kermarrec 8f1350ec40 targets/digilent_netfpga_sume.py: Limit mapped SDRAM size as on other targets. 2024-09-20 13:09:48 +02:00
Florent Kermarrec 223367d6b6 targets: +x on missing targets. 2024-09-20 13:03:17 +02:00
Florent Kermarrec b3599aaa3a CONTRIBUTORS: Update. 2024-09-20 13:02:26 +02:00
Florent Kermarrec fdea58b2ff LICENSE: Bump year. 2024-09-20 13:01:16 +02:00
Gustav 2d3a6b81e6
Add support for NetFPGA-Sume (#604) 2024-09-18 11:21:51 +02:00
Apostolos - Nikolaos Vailakis 1cfd32698c
Add support for Signaloid C0-microSD (#601) 2024-09-18 10:48:57 +02:00
Gwenhael Goavec-Merou 3050716e8e boards: digilent_nexys4ddr, kosagi_netv2, sipeed_tang_primer_20k: added eth_ip/remote_ip arg 2024-09-13 15:40:12 +02:00
Florent Kermarrec 4604379f46 platforms/sqrl_xcu1525: Revert previous commit, clk constraints were already present in DDR4 constraints. 2024-09-13 09:45:24 +02:00
Florent Kermarrec 90ff3d1ea9 platforms/sqrl_xcu1525.py: Add constraints on 300MHz clks. 2024-09-13 09:42:59 +02:00
Florent Kermarrec d842d9be72 test/test_targets: Exclude efinix_ti375_c529_dev_kit from CI since requires toolchain. 2024-09-11 09:13:40 +02:00
Florent Kermarrec 1dbecf704d efinix_ti375: Cosmetic cleanups on #610. 2024-09-11 09:10:48 +02:00
enjoy-digital d312ea331f
Merge pull request #610 from Dolu1990/ti375_c529 
Add efinix Ti375 c529 dev kit support
 2024-09-11 08:18:44 +02:00
Gwenhael Goavec-Merou 0adaababd9
Merge pull request #611 from trabucayre/efinix_rework_primitives 
targets/efinix_trion_t120_bga576_dev_kit.py: fix clock name to match sys_clk real name
 2024-09-10 18:41:54 +02:00
Gwenhael Goavec-Merou d0c07933bf litex_boards/targets/efinix_trion_t20_bga256_dev_kit.py: removed create_clkout name param, updated ClkOutput special 2024-09-10 16:37:12 +02:00
Gwenhael Goavec-Merou 59d32e4283 targets/efinix_trion_t120_bga576_dev_kit.py: fix clock name to match sys_clk real name 2024-09-10 08:06:43 +02:00
Dolu1990 d209f64a45 Add efinix_ti375_c529_dev_kit support 2024-09-05 15:30:55 +02:00
Dolu1990 b893374cdf Fix ti60 dev kit spi-sdcard voltage 2024-09-05 15:28:07 +02:00
Florent Kermarrec c8603bebe4 targets/hyperram: Switch Hyperram memory mode to rwx (required with VexiiRiscv). 2024-09-04 22:06:40 +02:00
Gwenhael Goavec-Merou 185f8d5da4
Merge pull request #603 from pepijndevos/apicula 
make Gowin boards work with Apicula
 2024-09-04 10:40:10 +02:00
Pepijn de Vos 8f59ebeffb WIP: make boards Gowin boards work with Apicula 2024-09-04 08:33:06 +02:00
enjoy-digital c8a86e578d
Merge pull request #609 from trabucayre/efinix_trion_t120_eth_rgmii_phy_arg 
targets/efinix_trion_t120_bga576_dev_kit.py: added argument to select between RMII PMOD (default) or onboard RGMII Phy
 2024-09-03 18:27:09 +02:00
Gwenhael Goavec-Merou 738a5a8931 targets/efinix_trion_t120_bga576_dev_kit.py: added argument to select between RMII PMOD (default) or onboard RGMII Phy 2024-09-03 19:16:39 +02:00
enjoy-digital d85fe974a6
Merge pull request #608 from trabucayre/efinix_trion_rgmii_ctl 
efinix_trion_t120_bga576_dev_kit.py: fixed/rewire rx_ctl/tx_ctl (not compatible with DDIO mode), added message at build time
 2024-09-03 16:12:33 +02:00
Gwenhael Goavec-Merou 7f26f3940f efinix_trion_t120_bga576_dev_kit.py: fixed/rewire rx_ctl/tx_ctl (not compatible with DDIO mode), added message at build time 2024-09-03 16:01:51 +02:00
enjoy-digital ffa98baa2d
Merge pull request #607 from trabucayre/efinix_eth_ip 
Efinix eth ip
 2024-09-03 11:48:59 +02:00
Gwenhael Goavec-Merou 0313424fa0 targets/efinix_trion_t120_bga576_dev_kit.py: added argument to configure remote-ip. Pass local_ip and remote_ip to add_etherxxx 2024-09-03 12:42:49 +02:00
Gwenhael Goavec-Merou 5a1e4bedfd targets/efinix_titanium_ti60_f225_dev_kit.py: disable software_debug by default 2024-09-03 12:41:05 +02:00
Gwenhael Goavec-Merou 0787517338 targets/efinix_titanium_ti60_f225_dev_kit.py: added argument to configure remote-ip. Pass local_ip and remote_ip to add_etherxxx 2024-09-03 12:40:35 +02:00
Dolu1990 21e42e5bf6 wip 2024-08-30 20:35:38 +02:00
enjoy-digital 737e9938fc
Merge pull request #606 from litex-hub/ti60_f225_hyperram_update 
ti60_f225_dev_kit: Update to new HyperRAM core with 2:1 ratio.
 2024-08-30 15:39:12 +02:00