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849 Commits

Author SHA1 Message Date
enjoy-digital 13e5062793
Merge pull request #379 from chmousset/add_t8_devkit 
[enh] added efinix t8f81 dev kit
 2022-03-28 14:58:21 +02:00
enjoy-digital e6a9f44580
Merge pull request #378 from antmicro/add-missing-peripherals 
DDR4 datacenter: add missing peripherals
 2022-03-28 14:40:22 +02:00
enjoy-digital 83d7c3fb39
Merge pull request #377 from Johnsel/arduino_mkrvidor4000 
Board support for Arduino MKR Vidor 4000
 2022-03-28 14:34:59 +02:00
Charles-Henri Mousset 7a68dcc79b [enh] added efinix t8f81 dev kit 2022-03-26 09:52:20 +01:00
Alessandro Comodi 33516a40f4 antmicro_datacenter: add missing peripherals 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2022-03-25 13:49:41 +01:00
Alessandro Comodi 77cb866233 antmicro_datacenter: add HDMI output 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2022-03-25 10:03:07 +01:00
John Simons 901942bda6 Cleanup for pushing. This commit combined with my litedram fork produces a running basic SoC + bios --=============== SoC ==================-- 
CPU:BUS:E 32-bit @ 4GiB
CSR:16-bit @ 48MT/s (CL-2 CWL-2)

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB
   Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 13.6MiB/s
   Read speed: 21.3MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
 2022-03-24 07:39:14 -07:00
Florent Kermarrec c081177d77 pynq_z1/zybo_z7: Update .xci (With changes from #99). 2022-03-24 09:15:36 +01:00
Florent Kermarrec bb974ae1af decklink_quad_hdmi_recorder: Add pcie_lanes parameter and 4x/8x support. 2022-03-23 15:24:49 +01:00
Florent Kermarrec ce4b627e3c targets: Remove l2_size workaround (no longer required). 2022-03-22 19:13:23 +01:00
Florent Kermarrec 2a206def0f targets/ecp5/ddr3: Uniformize cd_sys2x (reset_less). 2022-03-22 17:32:35 +01:00
John Simons b8b0aead28 Added basic support for Arduino MKR Vidor 4000 2022-03-21 18:54:29 -07:00
Florent Kermarrec 9d452b0d74 targets: Create target_group for target arguments. 2022-03-21 18:37:40 +01:00
Florent Kermarrec d90e260414 targets/digilent_atlys: Fix target. 2022-03-21 17:38:02 +01:00
Florent Kermarrec cc8da9d341 targets: Simplify imports and switch to LiteXSocArgumentParser. 
CPU parameters are now selectively exposed to the user:
./digilent_arty.py --cpu-type=vexriscv_smp --help will show VexRiscv-SMP parameters.
./digilent_arty.py --cpu-type=naxriscv --help will show NaxRiscv parameters.
 2022-03-21 16:59:40 +01:00
Florent Kermarrec eb8657f515 gsd_orangecrab: Revert dm_remapping (Useful when built with VexRiscv-SMP and native LiteDRAM interface). 2022-03-18 12:56:13 +01:00
Florent Kermarrec 9faa805ab9 alinx_ax7010: Review/Cleanup. 2022-03-17 11:31:02 +01:00
enjoy-digital 3aa1042f5f
Merge pull request #367 from ggangliu/zynq_xc7z010 
Add ALINX AX7010 board support
 2022-03-17 09:52:04 +01:00
Florent Kermarrec 496b2cfab9 targets/gowin: Switch to get_bitstream_filename. 2022-03-17 09:40:10 +01:00
Florent Kermarrec 773444a7dd targets: Switch to get_bios_filename/get_bitstream_filename. 2022-03-17 09:21:05 +01:00
Yonggang Liu 94786cae19
Update and rename xilinx_alinx_ax7010.py to alinx_ax7010.py 2022-03-17 11:24:24 +08:00
Florent Kermarrec 0745162a29 xilinx_zcu102: Review/Cleanup for consistency with others boards. 
Also remove INTERNAL_VREF constraints that are not yet useful (required for DRAM).
 2022-03-16 18:47:05 +01:00
Joseph Faye adbcc2e547
add zcu102 target file 2022-03-16 15:55:37 +01:00
Yonggang Liu 9dad1cb244
Rename xilinx_zynq_xc7z010.py to xilinx_alinx_ax7010.py 2022-03-15 15:51:13 +08:00
Yonggang Liu 9c55773275
Add files via upload 
Add zynq_xc7z010 board support
 2022-03-12 12:33:41 +08:00
Gabriel Somlo 9f9afeaafa targets/nexys-video: Add support for sata pll refclk 2022-03-11 14:40:21 -05:00
enjoy-digital 3b74673a93
Merge pull request #363 from curliph/master 
add Gowin programmer support
 2022-03-08 17:26:50 +01:00
Florent Kermarrec f52a915487 lambdaconcept_ecpix5: Add initial Video support at 640x480 (with Terminal/Framebuffer). 
I2C intialization code adapted from https://github.com/ultraembedded/ecpix-5.

Tested with:
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-terminal --build --load
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-framebuffer --build --load

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2022 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Mar  8 2022 15:34:22
 BIOS CRC passed (c7fe9ecd)

 Migen git sha1: ac70301
 LiteX git sha1: 7ebc7625

--=============== SoC ==================--
CPU:		FireV-STANDARD @ 75MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB
L2:		8KiB
SDRAM:		524288KiB 16-bit @ 300MT/s (CL-6 CWL-5)

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Read leveling:
  m0, b00: |01110000| delays: 02+-01
  m0, b01: |00000000| delays: -
  m0, b02: |00000000| delays: -
  m0, b03: |00000000| delays: -
  best: m0, b00 delays: 02+-01
  m1, b00: |01110000| delays: 02+-01
  m1, b01: |00000000| delays: -
  m1, b02: |00000000| delays: -
  m1, b03: |00000000| delays: -
  best: m1, b00 delays: 02+-01
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB
   Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 13.6MiB/s
   Read speed: 23.4MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex> ident
Ident: LiteX SoC on ECPIX-5 2022-03-08 15:34:19
 2022-03-08 15:40:52 +01:00
Florent Kermarrec 39e4e211bb targets/decklink_mini_4k: Add build/use instructions. 2022-03-08 14:14:18 +01:00
curliph 2df7fd573c
Update sipeed_tang_nano_9k.py 
Add Gowin programmer support
 2022-03-08 14:04:28 +08:00
curliph 4c9bc53a3c add Win/powershell and WSL support 2022-03-08 13:24:56 +08:00
Sylvain Munaut ec28ca8fa3 adi_adrv2crr: Add support for the ADI ADRV2CRR with ADRV9009-ZU11EG SoM 
This is a carrier board with a SoM mounted on it.
There is also an FMC connector that can accept another
AD-FMCOMMS8-EBZ to get two more ADRV9009 RFIC but support for
that is not added yet.

Note that the PCIe support requires :
 - Change the .xci in the litepcie to use the right Quad
 - Revert litex 3c34039b731b42e27e2ee6c8e399e5eb8f3a058f so the
   timing constrainst of litepcie apply correctly

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-03 22:17:09 +01:00
Florent Kermarrec 0f2e13fdf7 sqrl_fk33: Add HBM2 support (from https://github.com/enjoy-digital/fk33_hbm2_test). 2022-03-03 17:34:48 +01:00
Florent Kermarrec 99a66274c8 xilinx_alveo_u280: Switch HBM2 to USPHBM2 now integrated in LiteX. 2022-03-03 16:11:48 +01:00
Florent Kermarrec b80c7a7843 targets/sqrl_acorn: write_latency_calibration now disabled by default, no longer required. 2022-03-03 15:50:53 +01:00
Alessandro Comodi db2d83ea29 antmicro_datacenter: use 100 MHz and add i2c master 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2022-03-01 13:00:36 +01:00
Piotr Binkowski 0b80890119 antmicro_datacenter: add 1 cycle of latency for RCD IC 2022-03-01 12:43:08 +01:00
Piotr Binkowski 9976b47f72 antmicro_datacenter: generate outputs for rowhammer-tester 2022-03-01 12:43:08 +01:00
Karol Gugala 5359fc5bfc antmicro_datacenter: use A7DDRPHY 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2022-03-01 12:43:08 +01:00
Florent Kermarrec 2c4d31066f digilent_arty_z7: Defaults to no_uart. 2022-03-01 11:15:30 +01:00
Florent Kermarrec 673676e3cb digilent_arty_a7: Switch to VivadoProgrammer. 2022-03-01 10:48:22 +01:00
enjoy-digital 1320f3bd23
Merge pull request #357 from DaveBerkeley/colorlight_i9 
Add ColorLight i9 v7.2
 2022-03-01 10:07:55 +01:00
Florent Kermarrec a19c03fa55 targets: Switch to generic/portable HyperRAM core from LiteX. 2022-03-01 09:10:19 +01:00
Dave Berkeley c9d009c735 Add ColorLight i9 v7.2 2022-02-28 14:08:49 +00:00
Florent Kermarrec 1623ba5942 targets/stlv7325: Reduce sys_clk_freq to 100MHz. 
See https://github.com/enjoy-digital/litedram/issues/285.
 2022-02-25 09:04:07 +01:00
Florent Kermarrec 872113e1cc stlv7325: Add SDCard support. 2022-02-24 18:02:43 +01:00
Florent Kermarrec a08f346d90 stlv7325: Add Etherbone support (untested). 2022-02-24 17:43:53 +01:00
Florent Kermarrec b1550f006a stlv3225: Minor Review/Cleanup, switch to JTAG HS2 programmer. 2022-02-24 17:17:08 +01:00
Andrew Gillham 174d958ca7 Initial support for STLV7325 Kintex-7 board. 2022-02-23 18:28:55 +01:00
enjoy-digital 6661947d96
Merge pull request #354 from madscientist159/master 
Add initial support for RCS Arctic Tern boards
 2022-02-23 18:06:08 +01:00