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1335 Commits

Author SHA1 Message Date
Sergiu Mosanu 53007b3cb6 ignore ip directory and files 2022-02-01 14:24:48 -05:00
Florent Kermarrec 4251cfa865 terasic_de0nano: Add Build/Use instructions with JTAG-UART. 2022-02-01 15:58:34 +01:00
Florent Kermarrec 4d45611935 targets: Replace JTAG Atlantic (Deprecated) with JTAG-UART. 2022-02-01 11:30:26 +01:00
enjoy-digital 4281beac18
Merge pull request #343 from jevinskie/jev/deca-eth 
DECA: Add Ethernet and Etherbone support
 2022-01-31 16:23:17 +01:00
enjoy-digital 9144cb44fb
Merge branch 'master' into jev/deca-eth 2022-01-31 16:22:58 +01:00
enjoy-digital 3a6cc889d4
Merge pull request #341 from jevinskie/jev/altera-jtag 
Add JTAGbone support to Terasic DECA
 2022-01-31 16:07:18 +01:00
Jevin Sweval fbd424fc48 DECA: Add Ethernet and Etherbone support 
Also fixed pcf_en IO standard compared to golden Arrow project.
 2022-01-29 15:15:53 -08:00
Jevin Sweval 9e5224ca49 Add JTAGbone support to Terasic DECA 
Along the way I added UARTbone support to DECA as well for debugging.

Examples:

./terasic_deca.py --csr-csv csr.csv --with-jtagbone --build --load
litex_server --jtag --jtag-config ../prog/openocd_max10_blaster2.cfg
litex_term crossover

./terasic_deca.py --csr-csv csr.csv --uart-name jtag_uart --build --load
litex_term --jtag-config ../prog/openocd_max10_blaster2.cfg jtag
 2022-01-27 14:13:58 -08:00
enjoy-digital 597e5ca142
Merge pull request #340 from trabucayre/digilent_z7_yosys-nextpnr_support 
digilent arty z7: allows toolchain selection (PL only)
 2022-01-26 21:20:19 +01:00
Gwenhael Goavec-Merou dd134a4b7d digilent arty z7: allows toolchain selection (PL only) 2022-01-26 07:30:06 +01:00
Florent Kermarrec 74395ca80b digilent_nexyx_video: Add default toolchain value to CRG (to avoid breaking existing designs). 2022-01-25 16:13:57 +01:00
Florent Kermarrec 624572f2e9 alinx_axu2gca: Review and do minor cosmetic changes. 2022-01-25 14:58:47 +01:00
enjoy-digital 367222c455
Merge pull request #339 from trabucayre/alinx_axu2cga 
alinx_axu2gca: new board
 2022-01-25 14:54:46 +01:00
Gwenhael Goavec-Merou 537f04a13d alinx_axu2gca: new board 
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
 2022-01-25 07:35:42 +01:00
Florent Kermarrec 621d45cd9e digilent_arty: Review and improve CRG to avoid specific yosys+nextpnr code. 
sys4x/sys4x_dqs/idelay clks can be disabled when integrated-main-ram is used.
 2022-01-24 19:16:07 +01:00
enjoy-digital c2276c1e6d
Merge pull request #338 from suarezvictor/master 
Add tweaks to Arty board to support yosys+nextpnr toolchain
 2022-01-24 19:02:59 +01:00
Florent Kermarrec 1abb03e514 tang_nano_4k: Review/Cleanup: 
- Revert abstractions on clk_name/period: Too much abstraction to avoid duplications makes the code more difficult to read.
ex:
  - When constraining clk27, frequency is already in the name.
  - In the target, we want to know we are using clk27 as the main clk.
  - We need a default sys_clk_freq for project only importing BaseSoC.
- Revert SPI Flash import (for consistency with other targets).
- Keep VexRiscv as default CPU since this target is able to run it and also for consistency with other targets.
 2022-01-24 18:46:51 +01:00
enjoy-digital e357eb6d8f
Merge pull request #337 from sergachev/tang_nano_4k_emcu 
Enable LiteX BIOS on ARM core on Tang nano 4K
 2022-01-24 18:36:10 +01:00
Florent Kermarrec cc1b46f106 tang_nano_9k: Fix HyperRAM integration. 2022-01-24 18:35:12 +01:00
Victor Suarez Rovere db77ea5c7a Add tweaks to Arty board to support yosys+nextpnr toolchain 2022-01-24 02:06:34 -03:00
Ilia Sergachev f078e55bb1 tang nano 4k: fix removed default_clk_period, fix do_finalize signature 2022-01-23 16:47:20 +01:00
Ilia Sergachev 6238052b10 tang nano 4k: disable spi flash with gowin emcu, cleanup 2022-01-23 16:10:46 +01:00
Ilia Sergachev 6c81fc708c tang nano 4k: add memory regions, set default cpu 2022-01-23 13:05:51 +01:00
enjoy-digital 787f44e7d9
Merge pull request #336 from tcal-x/cmod-a7-flash 
Digilent CMOD A7: add flash support.
 2022-01-23 08:36:49 +01:00
enjoy-digital f9ac599d9b
Merge pull request #335 from Icenowy/tang9k_psram 
sipeed_tang_nano_9k: enable copackaged PSRAM
 2022-01-23 08:34:18 +01:00
Tim Callahan 6567af6f49 Digilent CMOD A7: add flash support. 
Add both "--flash" and "--with-spi-flash"; tested on board.
4MB flash mapped at 0x00400000.

Signed-off-by: Tim Callahan <tcal@google.com>
 2022-01-22 18:50:12 -08:00
Icenowy Zheng f533e7f8ba sipeed_tang_nano_9k: enable copackaged PSRAM 
Also enable SPI SDCard which was pending by the lack of main_ram
previously.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
 2022-01-23 03:37:03 +08:00
Florent Kermarrec e35b9b439f platforms/sipeed_tang_nano_9k: Fix copyrights and remove board diagram/description of the 4k. 2022-01-22 15:55:36 +01:00
enjoy-digital 999dbd572f
Merge pull request #334 from Icenowy/tang9k 
sipeed_tang_nano_9k: new board
 2022-01-22 15:49:08 +01:00
enjoy-digital 6f5dcd9d85
Merge pull request #333 from vacajk/master 
xilinx_zcu106: add DDR4 interface and fix reset error
 2022-01-22 15:48:30 +01:00
Icenowy Zheng e699c377a5 sipeed_tang_nano_9k: new board 
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
 2022-01-22 11:45:49 +08:00
vacajk e9d4d9066a xilinx_zcu106: add DDR4 interface and fix reset error 2022-01-22 03:08:21 +08:00
enjoy-digital b8aad4b030
Merge pull request #332 from tcal-x/prog-cmod-a7 
Add openocd programmer for Digilent CMOD A7.
 2022-01-21 08:05:22 +01:00
enjoy-digital 95766915b3
Merge pull request #330 from sergachev/fix/libeos_path 
quickfeather: fix path to libeos library
 2022-01-21 08:04:48 +01:00
Tim Callahan e0c4c0fe39 Add openocd programmer for Digilent CMOD A7. 
Signed-off-by: Tim Callahan <tcal@google.com>
 2022-01-20 20:54:03 -08:00
Ilia Sergachev 0e91013fc7 quickfeather: fix path to libeos library when board script called not from its directory; fix wget redownloads; add libeos to gitignore 2022-01-20 18:43:59 +01:00
Florent Kermarrec 5f2ccb2d32 targets: Switch from bridge to crossover. 2022-01-19 17:03:17 +01:00
Florent Kermarrec abb54cebb3 trenz_c10lprefkit: Add Etherbone support. 2022-01-19 14:47:14 +01:00
enjoy-digital 1ce978806d
Merge pull request #328 from sergachev/fix/zedboard_software 
Fix Zedboard software
 2022-01-19 10:05:49 +01:00
Florent Kermarrec f11106e9c5 targets/digilent_cmod_a7: Simplify/Cleanup. 2022-01-19 10:03:20 +01:00
enjoy-digital f8e3cc5361
Merge pull request #327 from bl0x/digilent_cmod_a7 
digilent_cmod_a7: Remove unused clocks.
 2022-01-19 09:59:44 +01:00
Ilia Sergachev bbf13f4439 zedboard: remove a hack 2022-01-19 02:41:11 +01:00
Ilia Sergachev 4f4d47dcdd zedboard: correct memory map 2022-01-19 02:40:54 +01:00
Florent Kermarrec fccb952c4b target: Remove ident_version=True no longer required. 2022-01-18 17:13:02 +01:00
Florent Kermarrec 7114911cea targets: --no-ident-version is now directly provided by LiteX, remove it on targets implementing it. 2022-01-18 16:47:38 +01:00
Florent Kermarrec d92a2b82fb targets/l2_cache_reverse: Now defaulting to False in LiteX, so setting it to False for correct Framebuffer operations is no longer required. 2022-01-18 11:37:55 +01:00
Gabriel Somlo 834125e978 platforms/digilent_nexys_video: add missing CD pin 2022-01-17 17:11:40 -05:00
Bastian Löher 2c26f07a5a digilent_cmod_a7: Remove unused clocks. 2022-01-17 22:49:10 +01:00
Florent Kermarrec 12fa844b56 decklink_mini_4k: Add dedicated SATA PLL to allow SATA + Framebuffer. 2022-01-17 18:11:52 +01:00
Florent Kermarrec f97e48e4f3 decklink_mini_4k: Add SATA support (over PCIe2SATA). 2022-01-17 14:19:59 +01:00