569c20ab86
muselab_icesugar: Switch to LiteSPI.
2021-07-29 19:55:32 +02:00
8df797c716
lattice_ice40up5k_evn: Switch to LiteSPI.
2021-07-29 19:50:36 +02:00
5e8c29d657
colorlight_i5: Switch to LiteSPI.
2021-07-29 19:47:41 +02:00
35ba3d9bc3
targets: Remove old call to add_spi_flash on targets now using LiteSPI (we'll find it with gitk is required).
2021-07-29 11:55:10 +02:00
54cee05986
#248 : Minor cleanup.
2021-07-28 18:20:42 +02:00
a41fbea5e6
Merge pull request #248 from JosephBushagour/jbushagour_fomu_spi_options
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Add option for different Fomu SPI ICs.
2021-07-28 18:18:12 +02:00
99ff82c75a
xilinx_alveo_u280: Add more IOs and enable HBM2.
2021-07-28 18:11:49 +02:00
7b3dce65c1
Add option for different Fomu SPI chips.
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Signed-off-by: Joey Bushagour <jbushagour@google.com>
2021-07-28 10:34:02 -05:00
401568c54e
digilent_arty_s7: Add SPI Flash.
2021-07-28 14:22:26 +02:00
64eadd8012
hackaday_hadbadge: Lower PLL's PFD Min from 10MHz to 8MHz.
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This is now required since ECP5PLL now checks that PFD is in required range.
2021-07-28 12:25:17 +02:00
6ce5db1b90
qmtech_xc7a35t: Fix default build.
2021-07-28 12:23:24 +02:00
1f4383475a
decklink_intensity_pro_4k: Fix default build.
2021-07-28 12:23:12 +02:00
3e8b6677e9
platforms: Make sure all platforms have a default Clk. (To be able to run simple target).
2021-07-28 12:03:06 +02:00
4e2b596ab3
digilent_arty/qmtech_xc7a35t: Rename --with-mapped-flash to --with-spi-flash.
2021-07-28 11:21:51 +02:00
fa3cc9b753
kosagi_fomu/spiflash: Switch to READ_1_1_4.
2021-07-28 11:10:34 +02:00
1118b09350
trenz_tec0117: Switch to LiteSPI.
2021-07-28 10:34:17 +02:00
9065cfa75d
kosagi_fomu: Switch to LiteSPI.
2021-07-27 19:55:04 +02:00
b3e7dbfd30
qmtech_xc7a35t: LiteSPI integration now provided by LiteX.
2021-07-27 19:39:50 +02:00
55ba0591df
targets: Remove SpiFlash imports (Obsolete since integration is provided by LiteX).
2021-07-27 19:35:19 +02:00
1c52e6b8fb
targets/digilent_arty/spiflash: LiteSPI integration now provided by LiteX.
2021-07-27 19:30:38 +02:00
15b5aec23f
1bitsquared_icebreaker_bitsy: Also switch to LiteSPI.
2021-07-27 19:27:28 +02:00
959780f372
1bitsquared_icebreaker: Switch to LiteSPI (with integration now done by LiteX).
...
Keep the old add_spi_flash call commented for now just in case we need to compare/test it.
2021-07-27 19:23:26 +02:00
533d25e845
1bitsquared_icebreaker: Enable LiteSPI Master but reduce FIFO depth to reduce resource usage.
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Already better regarding resource usage:
Info: ICESTORM_LC: 2938/ 5280 55%
Info: ICESTORM_RAM: 2/ 30 6%
Info: SB_IO: 15/ 96 15%
Info: SB_GB: 8/ 8 100%
Info: ICESTORM_PLL: 1/ 1 100%
Info: SB_WARMBOOT: 0/ 1 0%
Info: ICESTORM_DSP: 0/ 8 0%
Info: ICESTORM_HFOSC: 0/ 1 0%
Info: ICESTORM_LFOSC: 0/ 1 0%
Info: SB_I2C: 0/ 2 0%
Info: SB_SPI: 0/ 2 0%
Info: IO_I3C: 0/ 2 0%
Info: SB_LEDDA_IP: 0/ 1 0%
Info: SB_RGBA_DRV: 0/ 1 0%
Info: ICESTORM_SPRAM: 4/ 4 100%
2021-07-27 17:38:25 +02:00
12fb315e09
1bitsquared_icebreaker: Disable LiteSPI Master.
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Requires 80e9d2cea9
2021-07-27 17:00:55 +02:00
0f648ac4ef
1bitsquared_icebreaker: Add test code to use LiteSPI.
...
Both XiP from SPI(1X) or QSPI(4X) are working, but resource usage is currently
too high to be able to switch to it by default. We'll first try to reduce it.
Resource usage using SPI(1X) and actual LiteX SPI Flash core:
Info: Device utilisation:
Info: ICESTORM_LC: 2016/ 5280 38%
Info: ICESTORM_RAM: 2/ 30 6%
Info: SB_IO: 15/ 96 15%
Info: SB_GB: 8/ 8 100%
Info: ICESTORM_PLL: 1/ 1 100%
Info: SB_WARMBOOT: 0/ 1 0%
Info: ICESTORM_DSP: 0/ 8 0%
Info: ICESTORM_HFOSC: 0/ 1 0%
Info: ICESTORM_LFOSC: 0/ 1 0%
Info: SB_I2C: 0/ 2 0%
Info: SB_SPI: 0/ 2 0%
Info: IO_I3C: 0/ 2 0%
Info: SB_LEDDA_IP: 0/ 1 0%
Info: SB_RGBA_DRV: 0/ 1 0%
Info: ICESTORM_SPRAM: 4/ 4 100%
Resource usage using LiteSPI:
Info: Device utilisation:
Info: ICESTORM_LC: 3964/ 5280 75%
Info: ICESTORM_RAM: 2/ 30 6%
Info: SB_IO: 15/ 96 15%
Info: SB_GB: 8/ 8 100%
Info: ICESTORM_PLL: 1/ 1 100%
Info: SB_WARMBOOT: 0/ 1 0%
Info: ICESTORM_DSP: 0/ 8 0%
Info: ICESTORM_HFOSC: 0/ 1 0%
Info: ICESTORM_LFOSC: 0/ 1 0%
Info: SB_I2C: 0/ 2 0%
Info: SB_SPI: 0/ 2 0%
Info: IO_I3C: 0/ 2 0%
Info: SB_LEDDA_IP: 0/ 1 0%
Info: SB_RGBA_DRV: 0/ 1 0%
Info: ICESTORM_SPRAM: 4/ 4 100%
2021-07-27 16:50:18 +02:00
0ca203487b
pr243: Make led_chaser optional.
2021-07-27 15:00:18 +02:00
9835bd5f93
targets/muselab_icesugar_pro: +x.
2021-07-27 14:56:33 +02:00
2df3f9e664
pr243/platforms: Consistency with other platforms.
2021-07-27 14:55:19 +02:00
3fb73b3603
platforms/digilent_nexys4ddr: Fix INTERNAL_VREF voltage (0.900v instead of 0.750v).
2021-07-27 12:29:42 +02:00
2becaaabfc
pr243: Minor platform cleanups.
2021-07-27 12:28:04 +02:00
2418df9f2b
pr243: Add @tweakoz copyrights.
2021-07-27 12:21:23 +02:00
369d2cf49d
Merge pull request #243 from tweakoz/master
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add FPGA Boards (Digilent CMOD A7, Digilent Nexys 4, Micronova Mercury2)
2021-07-27 12:17:04 +02:00
10bfd50e22
targets/1bitsquared_icebreaker: Revert to 128KB SPRAM.
2021-07-27 12:03:39 +02:00
4d20cfe5cd
Merge pull request #245 from racerxdl/feat/MuselabIceSugarPro
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muselab_icesugar_pro: initial support
2021-07-23 14:34:57 +02:00
5852dbb88f
muselab_icesugar_pro: initial support
2021-07-22 11:26:27 -03:00
a3f479837c
digilent_arty: Allow exposing raw PMOD IOs (for tests with MicroPython).
2021-07-21 13:50:12 +02:00
a455713e0c
kosagi_fomu: Handle bios_flash_offset in flash function and make DFU flash offset explicit.
2021-07-21 11:41:35 +02:00
fbcecee1f8
Merge pull request #242 from tcal-x/fix-basys3-rst
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Basys3: Invert reset button, so that the board is reset when btnc is pushed.
2021-07-20 19:47:53 +02:00
8c8e163eee
trenz_tec0117: Add SDCard (SPI and SD mode), move SPI Flash to 0x00000000 and use default l2_cache_min_data_width.
2021-07-20 17:25:51 +02:00
75cadf845f
add FPGA Boards
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1. Digilent CMOD A7
https://reference.digilentinc.com/programmable-logic/cmod-a7/start
2. Digilent Nexys 4
https://reference.digilentinc.com/programmable-logic/nexys-4/start
3. MicroNova Mercury 2
https://www.micro-nova.com/mercury-2
2021-07-17 22:03:17 -06:00
5da2bdefb7
Invert reset button, so that board is reset when btn is pushed.
...
Signed-off-by: Tim Callahan <tcal@google.com>
2021-07-16 13:08:18 -07:00
4b48f15265
Merge pull request #236 from JosephBushagour/jbushagour_with_led_chaser
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Add with_led_chaser argument to constructor of boards using LedChaser submodule.
2021-07-16 14:41:05 +02:00
a74b6e83f7
trenz_tec0117: Add clock constraints.
2021-07-15 11:07:05 +02:00
6648b2f907
targets/trenz_tec0117: Switch SPI Flash to QSPI mode.
2021-07-15 09:15:34 +02:00
c369f4bb7f
trenz_tec0117: Get BIOS XiP from SPI Flash working, remove CPU variant force since can now fit default VexRiscv config.
2021-07-14 12:49:03 +02:00
132feaf3e8
trenz_tec0117: Prepare for 1:2 SDRAM rate (Not yet working at 1:2 but one step closer...).
2021-07-14 10:43:26 +02:00
ba8321a3ab
trenz_tec0117: Use new DDROutput to generate SDRAM Clk.
2021-07-14 10:02:58 +02:00
94b985ac56
trenz_tec0117: Use new integrated reset from GW1NPLL.
2021-07-14 09:55:00 +02:00
6e31d12fa9
trenz_tec0117: Avoid forcing CPU type (only force to lite variant when VexRiscv is selected=default).
2021-07-13 19:39:53 +02:00
1920db3535
Add with_led_chaser argument to constructor of boards using LedChaser submodule.
2021-07-06 16:39:37 -05:00
8c1e6c6a02
decklink_quad_hdmi_recorder: Remove WIP (SoC + DDR3 now working) and add build/use instructions.
2021-07-02 15:54:57 +02:00
2dff854b7a
decklink_quad_hdmi_recorder: Enable second DDR3 module.
2021-07-02 15:52:12 +02:00
a02855d105
decklink_quad_hdmi_recorder: Increase sys_clk to 200MHz.
2021-07-02 15:07:13 +02:00
b18f6a2c7f
decklink_quad_hdmi_recorder: Enable DRAM modules 0 and 1, fix pre placement constraints.
2021-07-02 14:32:53 +02:00
548f77c79c
decklink_quad_hdmi_recorder: Add INTERNAL_VREF constraint on DRAM banks.
2021-07-02 14:32:14 +02:00
7442639a5e
targets/digilent_arty: Add default value for CRG's with_mapped_flash.
...
Otherwise break retro-compat on external design importing CRG without passing this new parameter.
2021-07-02 09:33:06 +02:00
1b65bad4c2
decklink_quad_hdmi: Add Clk IOs, use clk200 as primary clk and add JTAGBone.
2021-07-01 20:00:35 +02:00
18b2758e4e
decklink_quad_hdmi_recorder: Add other DDR3 SDRAM modules building but untested.
2021-06-30 11:50:42 +02:00
e65308ee13
decklink_quad_hdmi_recorder: Add DDR3 SDRAM (only first module), building but untested.
2021-06-30 09:40:08 +02:00
84cb5d797d
decklink_intensity_pro_4k: Add WIP.
2021-06-30 09:06:00 +02:00
7cb155fb9c
icebreaker: Minor fix to usb (add PMOD2 position and fix typo)
...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2021-06-27 16:00:09 +02:00
591377cf95
decklink: Pinout fixes on itensity_pro_4k and quad_hdm_recorder.
2021-06-25 11:19:05 +02:00
ebfb4fad57
Add initial Decklink Intensity Pro 4K support (with documented PCIe / Untested).
2021-06-24 19:55:40 +02:00
5f8560bf69
Add initial Decklink Quad HDMI Recorder support (with documented PCIe/HDMI In).
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LitePCIe Gen3 X4 enumerating correctly.
2021-06-24 19:48:31 +02:00
8ec1435e65
targets/decklink_mini_4k: Fix typos.
2021-06-24 19:13:18 +02:00
87cd56d187
targets: Add new 1bitsquared_icebreaker_bitsy target
...
Most basic SoC ever but ... it runs
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2021-06-21 22:11:53 +02:00
2ebcb4a726
platforms: Add new 1bitsquared_icebreaker_bitsy platform
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2021-06-21 16:17:54 +02:00
4c758dc0e3
platforms/1bitsquared_icebreaker: Fix wrong URL in header
...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2021-06-21 16:16:47 +02:00
675616493c
platform/1bitsquare_icebreaker: Add possible USB pinouts
...
The pin outs come from LUNA :
https://github.com/greatscottgadgets/luna/blob/main/luna/gateware/platform/icebreaker.py#L94
and are some commonly used ones from other projects / pmods.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2021-06-20 22:25:49 +02:00
caac75c7db
trenz_max1000: Review/Cleanup.
2021-06-16 18:04:55 +02:00
8ef138eaa0
added MAX1000 board
2021-06-16 17:55:06 +02:00
fa045e6fa4
enclustra_mercury_kx2: Comment user_led2/3 (Conflicting with DRAM pins).
2021-06-16 11:54:52 +02:00
fe7b3968e4
Fix colorlight 5a 75b v6.1 flash pins
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As with the other versions, the clk pin can't be directly driven
2021-06-06 02:59:48 +02:00
588b430a0c
Merge pull request #217 from hansfbaier/master
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QMTech EP4CE15: Add daughterboard support, small DECA addition
2021-05-25 10:15:26 +02:00
df10fc54ad
muselab_icesugar/trenz_cyc1000: +x.
2021-05-25 08:46:33 +02:00
1c4825e7c4
basys3: Review/Simplify and fix build.
2021-05-25 08:44:26 +02:00
25867c4dcb
Merge pull request #218 from helium729/master
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Add digilent basys3 board support
2021-05-23 19:46:58 +02:00
dd5a4bdc92
CYC1000: Add initial support of CYC1000 board
2021-05-22 21:17:27 +02:00
bf123db20b
icebreaker/fomu: Update flashing and disconnect reset from SoC (will need proper support in iCE40PLL).
2021-05-20 09:14:54 +02:00
ce5b2a74a1
add digilent basys3 support
2021-05-17 16:39:16 +08:00
f01e0c02c9
qmtech ep4ce15: Add daughterboard support, add spiflash
2021-05-15 13:16:43 +07:00
c010b9a335
Merge pull request #215 from hansfbaier/qmtech-xc7a35t
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Qmtech xc7a35t
2021-05-10 08:31:08 +02:00
ddaab5317e
qmtech_xc7a35 set symbiflow_device, needed when using symbiflow
2021-05-08 18:01:01 +07:00
df447ddc87
QMTech XC7A35T: fix argument parser description
2021-05-08 08:49:07 +07:00
f2b51b0233
icesugar: map the usb port
2021-05-08 07:34:10 +07:00
5027b270fd
__init__.py: Add muselab to vendors.
2021-05-07 09:10:51 +02:00
e99272cb07
muselab_icesugar: Modify comments a bit.
2021-05-07 08:57:34 +02:00
5ae130661f
Merge pull request #213 from hansfbaier/icesugar
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muselab_icesugar: first basic version which boots
2021-05-07 08:50:50 +02:00
2c2a9db3cc
Merge pull request #212 from hansfbaier/qmtech-xc7a35t
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add QMTECH XC7A35T core board + daughter board
2021-05-07 08:32:16 +02:00
9e86c094c9
Merge pull request #211 from Acathla-fr/master
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Lattice iCE40 UltraPlus Breakout board (iCE40UP5K-B-EVN) added
2021-05-07 08:30:01 +02:00
c2e0f6026e
muselab_icesugar: first basic version that boots
2021-05-07 11:50:28 +07:00
3bb84b0071
Add initial Blackmagic Decklink Mini 4K support (with UART, DDR3, PCIe, Video Out).
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Mini Monitor 4K and Mini Recorder 4K are almost the same hardware with just changes on
the Video In/Out. For now tests have been done on the Mini Monitor 4K, but the aim is
support both boards in the same platform/target in the future, thus the mini_4k naming.
These boards could be used as affordable Artix7 dev boards for LiteX, to run Linux with
LiteX (512MB of RAM + a Video Framebuffer) or to create custom systems like a fast software
defined signal generator/recorder directly from a PC over PCIe, custom HDMI/SDI video
cards, etc... lots of possibilities :)
2021-05-06 09:47:01 +02:00
eec1078736
add QMTECH XC7A35T core board + daughter board
2021-05-06 05:50:48 +07:00
213d100860
Lattice iCE40 UltraPlus Breakout board (iCE40UP5K-B-EVN) added
2021-05-04 12:19:21 +02:00
026c623e17
Merge pull request #207 from hplp/master
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Minor fixes for AU280 [work in progress]
2021-05-03 10:20:34 +02:00
2c5bf95f70
targets/trenz_tec0117: Switch to new GW1NPLL.
2021-04-30 11:32:24 +02:00
4f45462b95
Merge branch 'master' of https://github.com/litex-hub/litex-boards
2021-04-29 15:41:03 -04:00
9686db0ed3
targets: Update names in build descriptions.
2021-04-29 11:56:52 +02:00
6117b98049
siglent_sds1104xe: Avoid disabling hardware interface with BIOS ethernet reset.
2021-04-29 11:52:41 +02:00
c28a161392
siglent_sds1104xe: Expose ethphy (to allow correct .dts generation).
2021-04-29 11:02:13 +02:00
Florent Kermarrec
Sergiu Mosanu
Joey Bushagour
Lucas Teske
Michael Mayers
Tim Callahan
Sylvain Munaut
Antti Lukats
David Sawatzke
Jakub Cabal
helium729
Hans Baier
Fabien