Florent Kermarrec
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376a836583
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sipeed_tang_nano: Add SPI Flash, Enable CPU and use new external SPI Flash support from OpenFPGALoader.
./sipeed_tang_nano_4k.py --cpu-type=vexriscv --cpu-variant=lite --build --flash
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Build your hardware, easily!
(c) Copyright 2012-2021 Enjoy-Digital
(c) Copyright 2007-2015 M-Labs
BIOS built on Sep 17 2021 15:54:08
BIOS CRC passed (6cc6de6d)
Migen git sha1: a5bc262
LiteX git sha1: 46cd9c5a
--=============== SoC ==================--
CPU: VexRiscv_Lite @ 27MHz
BUS: WISHBONE 32-bit @ 4GiB
CSR: 32-bit data
ROM: 64KiB
SRAM: 8KiB
FLASH: 4096KiB
--========== Initialization ============--
Initializing W25Q32 SPI Flash @0x80000000...
SPI Flash clk configured to 13 MHz
Memspeed at 0x80000000 (Sequential, 4.0KiB)...
Read speed: 1.3MiB/s
Memspeed at 0x80000000 (Random, 4.0KiB)...
Read speed: 521.9KiB/s
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found
--============= Console ================--
litex>
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2021-09-17 15:57:55 +02:00 |
Gwenhael Goavec-Merou