#!/usr/bin/env python3 # # This file is part of LiteX-Boards. # # Copyright (c) 2021 Gwenhael Goavec-Merou # SPDX-License-Identifier: BSD-2-Clause from migen import * from migen.genlib.resetsync import AsyncResetSynchronizer from litex.gen import LiteXModule from litex.soc.integration.soc_core import * from litex.soc.integration.builder import * from litex.soc.cores.led import LedChaser from litex_boards.platforms import myminieye_runber # CRG ---------------------------------------------------------------------------------------------- class _CRG(LiteXModule): def __init__(self, platform, sys_clk_freq): self.rst = Signal() self.cd_sys = ClockDomain() # # # # Clk / Rst clk12 = platform.request("clk12") rst_n = platform.request("user_btn", 0) self.comb += self.cd_sys.clk.eq(clk12) self.specials += AsyncResetSynchronizer(self.cd_sys, ~rst_n) # BaseSoC ------------------------------------------------------------------------------------------ class BaseSoC(SoCCore): def __init__(self, sys_clk_freq=int(12e6), with_led_chaser=True, **kwargs): platform = myminieye_runber.Platform() # CRG -------------------------------------------------------------------------------------- self.crg = _CRG(platform, sys_clk_freq) # SoCCore ---------------------------------------------------------------------------------- # Disable CPU for now. kwargs["cpu_type"] = None kwargs["integrated_sram_size"] = 0 SoCCore.__init__(self, platform, sys_clk_freq, ident="LiteX SoC on Runber", **kwargs) # Leds ------------------------------------------------------------------------------------- if with_led_chaser: self.leds = LedChaser( pads = platform.request_all("user_led"), sys_clk_freq = sys_clk_freq) # Build -------------------------------------------------------------------------------------------- def main(): from litex.build.parser import LiteXArgumentParser parser = LiteXArgumentParser(platform=myminieye_runber.Platform, description="LiteX SoC on Runber") parser.add_target_argument("--flash", action="store_true", help="Flash Bitstream.") parser.add_target_argument("--sys-clk-freq",default=12e6, help="System clock frequency.") args = parser.parse_args() soc = BaseSoC( sys_clk_freq = int(float(args.sys_clk_freq)), **parser.soc_argdict ) builder = Builder(soc, **parser.builder_argdict) if args.build: builder.build(**parser.toolchain_argdict) if args.load: prog = soc.platform.create_programmer() prog.load_bitstream(builder.get_bitstream_filename(mode="sram")) if args.flash: prog = soc.platform.create_programmer() prog.flash(0, builder.get_bitstream_filename(mode="flash", ext=".fs")) # FIXME if __name__ == "__main__": main()