120 lines
3.4 KiB
Python
120 lines
3.4 KiB
Python
#
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# This file is part of LiteX-Boards.
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#
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# Copyright (c) 2022 Lone Dynamics Corporation <info@lonedynamics.com>
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#
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# SPDX-License-Identifier: BSD-2-Clause
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticeECP5Platform
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from litex.build.openfpgaloader import OpenFPGALoader
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# IOs ----------------------------------------------------------------------------------------------
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_io_vx = [
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# Clock
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("clk48", 0, Pins("128"), IOStandard("LVCMOS33")),
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# LED
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("user_led", 0, Pins("52"), IOStandard("LVCMOS33")),
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# SDRAM
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("sdram_clock", 0, Pins("72"), IOStandard("LVTTL33")),
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("sdram", 0,
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Subsignal("a", Pins(
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"81 80 79 78 105 106 107 108 "
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"110 111 82 112 113")),
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Subsignal("ba", Pins("92 91")),
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Subsignal("cs_n", Pins("84")),
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Subsignal("cke", Pins("114")),
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Subsignal("ras_n", Pins("88")),
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Subsignal("cas_n", Pins("89")),
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Subsignal("we_n", Pins("90")),
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Subsignal("dq", Pins(
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"104 103 102 99 98 97 95 94 ",
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"116 117 118 119 120 121 124 125")),
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Subsignal("dm", Pins("93 115")),
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IOStandard("LVTTL33")
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),
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# Differential Data Multiple Interface
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("ddmi", 0,
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Subsignal("clk_p", Pins("69"),
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IOStandard("LVCMOS33D"), Misc("DRIVE=4")),
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Subsignal("data0_p", Pins("71"),
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IOStandard("LVCMOS33D"), Misc("DRIVE=4")),
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Subsignal("data1_p", Pins("74"),
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IOStandard("LVCMOS33D"), Misc("DRIVE=4")),
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Subsignal("data2_p", Pins("77"),
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IOStandard("LVCMOS33D"), Misc("DRIVE=4")),
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),
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# USB-C
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("usb", 0,
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Subsignal("d_p", Pins("40")),
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Subsignal("d_n", Pins("44")),
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Subsignal("pullup", Pins("45")),
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IOStandard("LVCMOS33")
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),
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# USB HOST
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("usb_host", 0,
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Subsignal("dp", Pins("39")),
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Subsignal("dm", Pins("41")),
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IOStandard("LVCMOS33")
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),
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# DEBUG UART (on USB host port)
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#("serial", 0,
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# Subsignal("tx", Pins("39")),
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# Subsignal("rx", Pins("41")),
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# IOStandard("LVCMOS33")
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#),
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]
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_io_v0 = [
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# SD card w/ SPI interface
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("spisdcard", 0,
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Subsignal("clk", Pins("50")),
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Subsignal("mosi", Pins("47")),
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Subsignal("cs_n", Pins("48")),
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Subsignal("miso", Pins("46")),
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Misc("SLEWRATE=FAST"),
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IOStandard("LVCMOS33"),
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),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors_vx = [
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticeECP5Platform):
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default_clk_name = "clk48"
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default_clk_period = 1e9/48e6
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def __init__(self, revision="v0", device="12F", toolchain="trellis", **kwargs):
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assert revision in ["v0"]
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assert device in ["12F", "25F", "45F", "85F"]
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self.revision = revision
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io = _io_vx
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connectors = _connectors_vx
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if revision == "v0": io += _io_v0
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LatticeECP5Platform.__init__(self, f"LFE5U-{device}-6TG144", io, connectors, toolchain=toolchain, **kwargs)
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def create_programmer(self, cable):
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return OpenFPGALoader(cable=cable)
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def do_finalize(self, fragment):
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LatticeECP5Platform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk48", loose=True), 1e9/48e6)
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