diff --git a/litex/soc/cores/cpu/mor1kx/core.py b/litex/soc/cores/cpu/mor1kx/core.py
index 03f8641d6..f6714f534 100644
--- a/litex/soc/cores/cpu/mor1kx/core.py
+++ b/litex/soc/cores/cpu/mor1kx/core.py
@@ -15,7 +15,8 @@ from litex import get_data_mod
 from litex.soc.interconnect import wishbone
 from litex.soc.cores.cpu import CPU
 
-CPU_VARIANTS = ["standard", "standard+fpu", "linux", "linux+fpu"]
+CPU_VARIANTS = ["standard", "standard+fpu", "linux", "linux+fpu",
+                "linux+smp", "linux+smp+fpu"]
 
 
 class MOR1KX(CPU):
@@ -113,6 +114,11 @@ class MOR1KX(CPU):
             p_DBUS_WB_TYPE              = "B3_REGISTERED_FEEDBACK",
         )
 
+        if "smp" in variant:
+           cpu_args.update(
+               p_OPTION_RF_NUM_SHADOW_GPR = 1,
+           )
+
         if "fpu" in variant:
             cpu_args.update(
                 p_FEATURE_FPU = "ENABLED",