diff --git a/.gitmodules b/.gitmodules
index d9db27542..706bd180e 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -19,3 +19,6 @@
 [submodule "litex/soc/cores/cpu/minerva/verilog"]
 	path = litex/soc/cores/cpu/minerva/verilog
 	url = http://github.com/enjoy-digital/minerva-verilog
+[submodule "litex/soc/cores/cpu/rocket/verilog"]
+	path = litex/soc/cores/cpu/rocket/verilog
+	url = https://github.com/gsomlo/rocket-litex-verilog
diff --git a/litex/soc/cores/cpu/rocket/verilog b/litex/soc/cores/cpu/rocket/verilog
new file mode 160000
index 000000000..bcb12b023
--- /dev/null
+++ b/litex/soc/cores/cpu/rocket/verilog
@@ -0,0 +1 @@
+Subproject commit bcb12b0233b050dddef8d9c69bbf590d10428647