From 01e9a5432114e9487f9e56ebc8860e54b9118e20 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Mon, 20 Feb 2023 11:04:37 +0100
Subject: [PATCH] tools/litex_json2dts_linux: Add initial CLINT DTS generation.

---
 litex/tools/litex_json2dts_linux.py | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/litex/tools/litex_json2dts_linux.py b/litex/tools/litex_json2dts_linux.py
index c3a399f54..284986c9b 100755
--- a/litex/tools/litex_json2dts_linux.py
+++ b/litex/tools/litex_json2dts_linux.py
@@ -81,8 +81,8 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
 
     # CPU ------------------------------------------------------------------------------------------
 
-    # VexRiscv-SMP
-    # ------------
+    # RISC-V
+    # ------
     if cpu_arch == "riscv":
         # Cache description.
         cache_desc = ""
@@ -272,6 +272,15 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
     # Interrupt Controller -------------------------------------------------------------------------
 
     if cpu_arch == "riscv":
+        # CHECKME: interrupts-extended.
+        dts += """
+            lintc0: clint@{clint_base:x} {{
+                compatible = "riscv,clint0";
+                interrupts-extended = <&L4 3 &L4 7>;
+                reg = <0x{clint_base:x} 0x10000>;
+                reg-names = "control";
+            }};
+""".format(clint_base=d["memories"]["clint"]["base"])
         dts += """
             intc0: interrupt-controller@{plic_base:x} {{
                 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";