diff --git a/litex/soc/interconnect/csr.py b/litex/soc/interconnect/csr.py index b9fc46e78..ab1730a0e 100644 --- a/litex/soc/interconnect/csr.py +++ b/litex/soc/interconnect/csr.py @@ -428,6 +428,8 @@ class CSRStorage(_CompoundCSR): """Write method for simulation. Side effects: synchronous advances simulation clk by one tick.""" + if bits_for(value) > self.size: + raise ValueError(f"value {value} exceeds range of {self.size} bit CSR {self.name}.") yield self.storage.eq(value) yield self.re.eq(1)