From 095cfb781151bea54867a257f9511a5f058282d2 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 27 Jul 2023 15:02:37 +0200 Subject: [PATCH] litex/gen: Split common in common/context/reduce/signal. --- litex/gen/__init__.py | 5 +++++ litex/gen/common.py | 51 ------------------------------------------- litex/gen/context.py | 17 +++++++++++++++ litex/gen/reduce.py | 33 ++++++++++++++++++++++++++++ litex/gen/signal.py | 21 ++++++++++++++++++ 5 files changed, 76 insertions(+), 51 deletions(-) create mode 100644 litex/gen/context.py create mode 100644 litex/gen/reduce.py create mode 100644 litex/gen/signal.py diff --git a/litex/gen/__init__.py b/litex/gen/__init__.py index 507ac7efe..e329fc4cd 100644 --- a/litex/gen/__init__.py +++ b/litex/gen/__init__.py @@ -1,3 +1,8 @@ from litex.gen.sim import * + from litex.gen.common import * +from litex.gen.signal import * +from litex.gen.reduce import * +from litex.gen.context import * + from litex.gen.fhdl.module import * diff --git a/litex/gen/common.py b/litex/gen/common.py index ce286c965..150f06940 100644 --- a/litex/gen/common.py +++ b/litex/gen/common.py @@ -24,58 +24,7 @@ def colorer(s, color="bright"): def reverse_bits(s): return s[::-1] - def reverse_bytes(s): n = (len(s) + 7)//8 return Cat(*[s[i*8:min((i + 1)*8, len(s))] for i in reversed(range(n))]) - -# Context ------------------------------------------------------------------------------------------ - -# FIXME: PoC to fix Efinix AsyncFIFO issue, think a bit more about it to see how to do it properly. - -class LiteXContext: - platform = None - toolchain = None - device = None - soc = None - -# Signals ------------------------------------------------------------------------------------------ - -class Open(Signal): pass - -class Unsigned(Signal): - def __init__(self, bits=1, *args, **kwargs): - assert isinstance(bits, int) - Signal.__init__(self, bits_sign=(bits, 0), *args, **kwargs) - -class Signed(Signal): - def __init__(self, bits=1, *args, **kwargs): - assert isinstance(bits, int) - Signal.__init__(self, bits_sign=(bits, 1), *args, **kwargs) - -# Reduction ---------------------------------------------------------------------------------------- - -from functools import reduce -from operator import and_, or_, not_, xor, add - -def Reduce(operator, value): - # List of supported Operators. - operators = { - "AND" : and_, - "OR" : or_, - "NOR" : not_, - "XOR" : xor, - "ADD" : add, - } - - # Switch to upper-case. - operator = operator.upper() - - # Check if provided operator is supported. - if operator not in operators.keys(): - supported = ", ".join(operators.keys()) - raise ValueError(f"Reduce does not support {operator} operator; supported: {supported}.") - - # Return Python's reduction. - return reduce(operators[operator], value) diff --git a/litex/gen/context.py b/litex/gen/context.py new file mode 100644 index 000000000..39ffa51f0 --- /dev/null +++ b/litex/gen/context.py @@ -0,0 +1,17 @@ +# +# This file is part of LiteX. +# +# This file is Copyright (c) 2023 Florent Kermarrec +# SPDX-License-Identifier: BSD-2-Clause + +from migen import * + +# LiteX Context ------------------------------------------------------------------------------------ + +# FIXME: PoC to fix Efinix AsyncFIFO issue, think a bit more about it to see how to do it properly. + +class LiteXContext: + platform = None + toolchain = None + device = None + soc = None diff --git a/litex/gen/reduce.py b/litex/gen/reduce.py new file mode 100644 index 000000000..63fc7e29d --- /dev/null +++ b/litex/gen/reduce.py @@ -0,0 +1,33 @@ +# +# This file is part of LiteX. +# +# This file is Copyright (c) 2022 Florent Kermarrec +# SPDX-License-Identifier: BSD-2-Clause + +from migen import * + +from functools import reduce +from operator import and_, or_, not_, xor, add + +# Reduction ---------------------------------------------------------------------------------------- + +def Reduce(operator, value): + # List of supported Operators. + operators = { + "AND" : and_, + "OR" : or_, + "NOR" : not_, + "XOR" : xor, + "ADD" : add, + } + + # Switch to upper-case. + operator = operator.upper() + + # Check if provided operator is supported. + if operator not in operators.keys(): + supported = ", ".join(operators.keys()) + raise ValueError(f"Reduce does not support {operator} operator; supported: {supported}.") + + # Return Python's reduction. + return reduce(operators[operator], value) diff --git a/litex/gen/signal.py b/litex/gen/signal.py new file mode 100644 index 000000000..0714aa423 --- /dev/null +++ b/litex/gen/signal.py @@ -0,0 +1,21 @@ +# +# This file is part of LiteX. +# +# This file is Copyright (c) 2022 Florent Kermarrec +# SPDX-License-Identifier: BSD-2-Clause + +from migen import * + +# Signals ------------------------------------------------------------------------------------------ + +class Open(Signal): pass + +class Unsigned(Signal): + def __init__(self, bits=1, *args, **kwargs): + assert isinstance(bits, int) + Signal.__init__(self, bits_sign=(bits, 0), *args, **kwargs) + +class Signed(Signal): + def __init__(self, bits=1, *args, **kwargs): + assert isinstance(bits, int) + Signal.__init__(self, bits_sign=(bits, 1), *args, **kwargs)