diff --git a/litex/soc/interconnect/wishbone.py b/litex/soc/interconnect/wishbone.py
index 5e600b261..57eead4df 100644
--- a/litex/soc/interconnect/wishbone.py
+++ b/litex/soc/interconnect/wishbone.py
@@ -317,8 +317,8 @@ class Crossbar(LiteXModule):
                     columns[slave[2]].append(interface)
                     row.append((slave[0], interface))
 
-                    
-            self.submodules += Decoder(master, row, register)                
+            self.submodules += Decoder(master, row, register)
+            self.submodules += Timeout(master, timeout_cycles)            
 
         # arbitrate each access column onto its slave
         for (match, bus, name) in slaves: