From 0f410e45f177c5f7f8f2e4a0a29b84d226127f07 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Thu, 24 Sep 2015 09:05:10 +0800 Subject: [PATCH] cores directory --- .gitmodules | 8 ++++---- misoc/{liteethmini => cores}/__init__.py | 0 misoc/{ => cores}/dvisampler/__init__.py | 0 misoc/{ => cores}/dvisampler/analysis.py | 0 misoc/{ => cores}/dvisampler/chansync.py | 0 misoc/{ => cores}/dvisampler/charsync.py | 0 misoc/{ => cores}/dvisampler/clocking.py | 0 misoc/{ => cores}/dvisampler/common.py | 0 misoc/{ => cores}/dvisampler/core.py | 0 misoc/{ => cores}/dvisampler/datacapture.py | 0 misoc/{ => cores}/dvisampler/debug.py | 0 misoc/{ => cores}/dvisampler/decoding.py | 0 misoc/{ => cores}/dvisampler/dma.py | 0 misoc/{ => cores}/dvisampler/edid.py | 0 misoc/{ => cores}/dvisampler/wer.py | 0 misoc/{ => cores}/framebuffer/__init__.py | 0 misoc/{ => cores}/framebuffer/core.py | 0 misoc/{ => cores}/framebuffer/dvi.py | 0 misoc/{ => cores}/framebuffer/format.py | 0 misoc/{ => cores}/framebuffer/phy.py | 0 misoc/{ => cores}/gpio.py | 0 misoc/{ => cores}/identifier.py | 0 misoc/{ => cores}/liteethmini/LICENSE | 0 misoc/{ => cores}/liteethmini/README | 0 .../mac/frontend => cores/liteethmini}/__init__.py | 0 misoc/{ => cores}/liteethmini/common.py | 0 misoc/{ => cores}/liteethmini/mac/__init__.py | 0 misoc/{ => cores}/liteethmini/mac/core/__init__.py | 0 misoc/{ => cores}/liteethmini/mac/core/crc.py | 0 misoc/{ => cores}/liteethmini/mac/core/gap.py | 0 misoc/{ => cores}/liteethmini/mac/core/last_be.py | 0 misoc/{ => cores}/liteethmini/mac/core/padding.py | 0 misoc/{ => cores}/liteethmini/mac/core/preamble.py | 0 .../sdram => cores/liteethmini/mac}/frontend/__init__.py | 0 misoc/{ => cores}/liteethmini/mac/frontend/sram.py | 0 misoc/{ => cores}/liteethmini/mac/frontend/wishbone.py | 0 misoc/{ => cores}/liteethmini/phy/__init__.py | 0 misoc/{ => cores}/liteethmini/phy/gmii.py | 0 misoc/{ => cores}/liteethmini/phy/gmii_mii.py | 0 misoc/{ => cores}/liteethmini/phy/loopback.py | 0 misoc/{ => cores}/liteethmini/phy/mii.py | 0 misoc/{ => cores}/liteethmini/phy/s6rgmii.py | 0 misoc/{ => cores}/liteethmini/phy/sim.py | 0 misoc/{ => cores}/lm32/core.py | 0 misoc/{ => cores}/lm32/verilog/lm32_config.v | 0 misoc/{mem/sdram/phy => cores/mor1kx}/__init__.py | 0 misoc/{ => cores}/mor1kx/core.py | 0 misoc/{ => cores}/mxcrg.v | 0 misoc/{ => cores}/norflash16.py | 0 misoc/{mem => cores}/sdram/__init__.py | 0 misoc/{mem => cores}/sdram/core/__init__.py | 0 misoc/{mem => cores}/sdram/core/lasmibus.py | 0 misoc/{mem => cores}/sdram/core/lasmicon/__init__.py | 0 misoc/{mem => cores}/sdram/core/lasmicon/bankmachine.py | 0 misoc/{mem => cores}/sdram/core/lasmicon/multiplexer.py | 0 misoc/{mem => cores}/sdram/core/lasmicon/perf.py | 0 misoc/{mem => cores}/sdram/core/lasmicon/refresher.py | 0 misoc/{mem => cores}/sdram/core/lasmixbar.py | 0 misoc/{mem => cores}/sdram/core/minicon/__init__.py | 0 misoc/{mor1kx => cores/sdram/frontend}/__init__.py | 0 misoc/{mem => cores}/sdram/frontend/dma_lasmi.py | 0 misoc/{mem => cores}/sdram/frontend/memtest.py | 0 misoc/{mem => cores}/sdram/frontend/wishbone2lasmi.py | 0 misoc/{mem => cores}/sdram/module.py | 0 misoc/cores/sdram/phy/__init__.py | 0 misoc/{mem => cores}/sdram/phy/dfi.py | 0 misoc/{mem => cores}/sdram/phy/dfii.py | 0 misoc/{mem => cores}/sdram/phy/gensdrphy.py | 0 misoc/{mem => cores}/sdram/phy/initsequence.py | 0 misoc/{mem => cores}/sdram/phy/k7ddrphy.py | 0 misoc/{mem => cores}/sdram/phy/s6ddrphy.py | 0 misoc/{mem => cores}/sdram/phy/simphy.py | 0 .../sdram/test/abstract_transactions_lasmi.py | 0 misoc/{mem => cores}/sdram/test/bankmachine_tb.py | 0 misoc/{mem => cores}/sdram/test/common.py | 0 misoc/{mem => cores}/sdram/test/lasmicon_df_tb.py | 0 misoc/{mem => cores}/sdram/test/lasmicon_tb.py | 0 misoc/{mem => cores}/sdram/test/lasmicon_wb.py | 0 misoc/{mem => cores}/sdram/test/minicon_tb.py | 0 misoc/{mem => cores}/sdram/test/refresher.py | 0 misoc/{ => cores}/spi/__init__.py | 0 misoc/{ => cores}/spi/core.py | 0 misoc/{ => cores}/spi/test.py | 0 misoc/{ => cores}/spiflash.py | 0 misoc/{ => cores}/timer.py | 0 misoc/{ => cores}/uart/__init__.py | 0 misoc/{ => cores}/uart/core.py | 0 misoc/{ => cores}/uart/test.py | 0 88 files changed, 4 insertions(+), 4 deletions(-) rename misoc/{liteethmini => cores}/__init__.py (100%) rename misoc/{ => cores}/dvisampler/__init__.py (100%) rename misoc/{ => cores}/dvisampler/analysis.py (100%) rename misoc/{ => cores}/dvisampler/chansync.py (100%) rename misoc/{ => cores}/dvisampler/charsync.py (100%) rename misoc/{ => cores}/dvisampler/clocking.py (100%) rename misoc/{ => cores}/dvisampler/common.py (100%) rename misoc/{ => cores}/dvisampler/core.py (100%) rename misoc/{ => cores}/dvisampler/datacapture.py (100%) rename misoc/{ => cores}/dvisampler/debug.py (100%) rename misoc/{ => cores}/dvisampler/decoding.py (100%) rename misoc/{ => cores}/dvisampler/dma.py (100%) rename misoc/{ => cores}/dvisampler/edid.py (100%) rename misoc/{ => cores}/dvisampler/wer.py (100%) rename misoc/{ => cores}/framebuffer/__init__.py (100%) rename misoc/{ => cores}/framebuffer/core.py (100%) rename misoc/{ => cores}/framebuffer/dvi.py (100%) rename misoc/{ => cores}/framebuffer/format.py (100%) rename misoc/{ => cores}/framebuffer/phy.py (100%) rename misoc/{ => cores}/gpio.py (100%) rename misoc/{ => cores}/identifier.py (100%) rename misoc/{ => cores}/liteethmini/LICENSE (100%) rename misoc/{ => cores}/liteethmini/README (100%) rename misoc/{liteethmini/mac/frontend => cores/liteethmini}/__init__.py (100%) rename misoc/{ => cores}/liteethmini/common.py (100%) rename misoc/{ => cores}/liteethmini/mac/__init__.py (100%) rename misoc/{ => cores}/liteethmini/mac/core/__init__.py (100%) rename misoc/{ => cores}/liteethmini/mac/core/crc.py (100%) rename misoc/{ => cores}/liteethmini/mac/core/gap.py (100%) rename misoc/{ => cores}/liteethmini/mac/core/last_be.py (100%) rename misoc/{ => cores}/liteethmini/mac/core/padding.py (100%) rename misoc/{ => cores}/liteethmini/mac/core/preamble.py (100%) rename misoc/{mem/sdram => cores/liteethmini/mac}/frontend/__init__.py (100%) rename misoc/{ => cores}/liteethmini/mac/frontend/sram.py (100%) rename misoc/{ => cores}/liteethmini/mac/frontend/wishbone.py (100%) rename misoc/{ => cores}/liteethmini/phy/__init__.py (100%) rename misoc/{ => cores}/liteethmini/phy/gmii.py (100%) rename misoc/{ => cores}/liteethmini/phy/gmii_mii.py (100%) rename misoc/{ => cores}/liteethmini/phy/loopback.py (100%) rename misoc/{ => cores}/liteethmini/phy/mii.py (100%) rename misoc/{ => cores}/liteethmini/phy/s6rgmii.py (100%) rename misoc/{ => cores}/liteethmini/phy/sim.py (100%) rename misoc/{ => cores}/lm32/core.py (100%) rename misoc/{ => cores}/lm32/verilog/lm32_config.v (100%) rename misoc/{mem/sdram/phy => cores/mor1kx}/__init__.py (100%) rename misoc/{ => cores}/mor1kx/core.py (100%) rename misoc/{ => cores}/mxcrg.v (100%) rename misoc/{ => cores}/norflash16.py (100%) rename misoc/{mem => cores}/sdram/__init__.py (100%) rename misoc/{mem => cores}/sdram/core/__init__.py (100%) rename misoc/{mem => cores}/sdram/core/lasmibus.py (100%) rename misoc/{mem => cores}/sdram/core/lasmicon/__init__.py (100%) rename misoc/{mem => cores}/sdram/core/lasmicon/bankmachine.py (100%) rename misoc/{mem => cores}/sdram/core/lasmicon/multiplexer.py (100%) rename misoc/{mem => cores}/sdram/core/lasmicon/perf.py (100%) rename misoc/{mem => cores}/sdram/core/lasmicon/refresher.py (100%) rename misoc/{mem => cores}/sdram/core/lasmixbar.py (100%) rename misoc/{mem => cores}/sdram/core/minicon/__init__.py (100%) rename misoc/{mor1kx => cores/sdram/frontend}/__init__.py (100%) rename misoc/{mem => cores}/sdram/frontend/dma_lasmi.py (100%) rename misoc/{mem => cores}/sdram/frontend/memtest.py (100%) rename misoc/{mem => cores}/sdram/frontend/wishbone2lasmi.py (100%) rename misoc/{mem => cores}/sdram/module.py (100%) create mode 100644 misoc/cores/sdram/phy/__init__.py rename misoc/{mem => cores}/sdram/phy/dfi.py (100%) rename misoc/{mem => cores}/sdram/phy/dfii.py (100%) rename misoc/{mem => cores}/sdram/phy/gensdrphy.py (100%) rename misoc/{mem => cores}/sdram/phy/initsequence.py (100%) rename misoc/{mem => cores}/sdram/phy/k7ddrphy.py (100%) rename misoc/{mem => cores}/sdram/phy/s6ddrphy.py (100%) rename misoc/{mem => cores}/sdram/phy/simphy.py (100%) rename misoc/{mem => cores}/sdram/test/abstract_transactions_lasmi.py (100%) rename misoc/{mem => cores}/sdram/test/bankmachine_tb.py (100%) rename misoc/{mem => cores}/sdram/test/common.py (100%) rename misoc/{mem => cores}/sdram/test/lasmicon_df_tb.py (100%) rename misoc/{mem => cores}/sdram/test/lasmicon_tb.py (100%) rename misoc/{mem => cores}/sdram/test/lasmicon_wb.py (100%) rename misoc/{mem => cores}/sdram/test/minicon_tb.py (100%) rename misoc/{mem => cores}/sdram/test/refresher.py (100%) rename misoc/{ => cores}/spi/__init__.py (100%) rename misoc/{ => cores}/spi/core.py (100%) rename misoc/{ => cores}/spi/test.py (100%) rename misoc/{ => cores}/spiflash.py (100%) rename misoc/{ => cores}/timer.py (100%) rename misoc/{ => cores}/uart/__init__.py (100%) rename misoc/{ => cores}/uart/core.py (100%) rename misoc/{ => cores}/uart/test.py (100%) diff --git a/.gitmodules b/.gitmodules index 0dc417a34..3b25a246f 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,8 +1,8 @@ -[submodule "misoc/lm32/verilog/submodule"] - path = misoc/lm32/verilog/submodule +[submodule "misoc/cores/lm32/verilog/submodule"] + path = misoc/cores/lm32/verilog/submodule url = https://github.com/m-labs/lm32.git -[submodule "misoc/mor1kx/verilog"] - path = misoc/mor1kx/verilog +[submodule "misoc/cores/mor1kx/verilog"] + path = misoc/cores/mor1kx/verilog url = https://github.com/openrisc/mor1kx.git [submodule "software/compiler-rt"] path = software/compiler-rt diff --git a/misoc/liteethmini/__init__.py b/misoc/cores/__init__.py similarity index 100% rename from misoc/liteethmini/__init__.py rename to misoc/cores/__init__.py diff --git a/misoc/dvisampler/__init__.py b/misoc/cores/dvisampler/__init__.py similarity index 100% rename from misoc/dvisampler/__init__.py rename to misoc/cores/dvisampler/__init__.py diff --git a/misoc/dvisampler/analysis.py b/misoc/cores/dvisampler/analysis.py similarity index 100% rename from misoc/dvisampler/analysis.py rename to misoc/cores/dvisampler/analysis.py diff --git a/misoc/dvisampler/chansync.py b/misoc/cores/dvisampler/chansync.py similarity index 100% rename from misoc/dvisampler/chansync.py rename to misoc/cores/dvisampler/chansync.py diff --git a/misoc/dvisampler/charsync.py b/misoc/cores/dvisampler/charsync.py similarity index 100% rename from misoc/dvisampler/charsync.py rename to misoc/cores/dvisampler/charsync.py diff --git a/misoc/dvisampler/clocking.py b/misoc/cores/dvisampler/clocking.py similarity index 100% rename from misoc/dvisampler/clocking.py rename to misoc/cores/dvisampler/clocking.py diff --git a/misoc/dvisampler/common.py b/misoc/cores/dvisampler/common.py similarity index 100% rename from misoc/dvisampler/common.py rename to misoc/cores/dvisampler/common.py diff --git a/misoc/dvisampler/core.py b/misoc/cores/dvisampler/core.py similarity index 100% rename from misoc/dvisampler/core.py rename to misoc/cores/dvisampler/core.py diff --git a/misoc/dvisampler/datacapture.py b/misoc/cores/dvisampler/datacapture.py similarity index 100% rename from misoc/dvisampler/datacapture.py rename to misoc/cores/dvisampler/datacapture.py diff --git a/misoc/dvisampler/debug.py b/misoc/cores/dvisampler/debug.py similarity index 100% rename from misoc/dvisampler/debug.py rename to misoc/cores/dvisampler/debug.py diff --git a/misoc/dvisampler/decoding.py b/misoc/cores/dvisampler/decoding.py similarity index 100% rename from misoc/dvisampler/decoding.py rename to misoc/cores/dvisampler/decoding.py diff --git a/misoc/dvisampler/dma.py b/misoc/cores/dvisampler/dma.py similarity index 100% rename from misoc/dvisampler/dma.py rename to misoc/cores/dvisampler/dma.py diff --git a/misoc/dvisampler/edid.py b/misoc/cores/dvisampler/edid.py similarity index 100% rename from misoc/dvisampler/edid.py rename to misoc/cores/dvisampler/edid.py diff --git a/misoc/dvisampler/wer.py b/misoc/cores/dvisampler/wer.py similarity index 100% rename from misoc/dvisampler/wer.py rename to misoc/cores/dvisampler/wer.py diff --git a/misoc/framebuffer/__init__.py b/misoc/cores/framebuffer/__init__.py similarity index 100% rename from misoc/framebuffer/__init__.py rename to misoc/cores/framebuffer/__init__.py diff --git a/misoc/framebuffer/core.py b/misoc/cores/framebuffer/core.py similarity index 100% rename from misoc/framebuffer/core.py rename to misoc/cores/framebuffer/core.py diff --git a/misoc/framebuffer/dvi.py b/misoc/cores/framebuffer/dvi.py similarity index 100% rename from misoc/framebuffer/dvi.py rename to misoc/cores/framebuffer/dvi.py diff --git a/misoc/framebuffer/format.py b/misoc/cores/framebuffer/format.py similarity index 100% rename from misoc/framebuffer/format.py rename to misoc/cores/framebuffer/format.py diff --git a/misoc/framebuffer/phy.py b/misoc/cores/framebuffer/phy.py similarity index 100% rename from misoc/framebuffer/phy.py rename to misoc/cores/framebuffer/phy.py diff --git a/misoc/gpio.py b/misoc/cores/gpio.py similarity index 100% rename from misoc/gpio.py rename to misoc/cores/gpio.py diff --git a/misoc/identifier.py b/misoc/cores/identifier.py similarity index 100% rename from misoc/identifier.py rename to misoc/cores/identifier.py diff --git a/misoc/liteethmini/LICENSE b/misoc/cores/liteethmini/LICENSE similarity index 100% rename from misoc/liteethmini/LICENSE rename to misoc/cores/liteethmini/LICENSE diff --git a/misoc/liteethmini/README b/misoc/cores/liteethmini/README similarity index 100% rename from misoc/liteethmini/README rename to misoc/cores/liteethmini/README diff --git a/misoc/liteethmini/mac/frontend/__init__.py b/misoc/cores/liteethmini/__init__.py similarity index 100% rename from misoc/liteethmini/mac/frontend/__init__.py rename to misoc/cores/liteethmini/__init__.py diff --git a/misoc/liteethmini/common.py b/misoc/cores/liteethmini/common.py similarity index 100% rename from misoc/liteethmini/common.py rename to misoc/cores/liteethmini/common.py diff --git a/misoc/liteethmini/mac/__init__.py b/misoc/cores/liteethmini/mac/__init__.py similarity index 100% rename from misoc/liteethmini/mac/__init__.py rename to misoc/cores/liteethmini/mac/__init__.py diff --git a/misoc/liteethmini/mac/core/__init__.py b/misoc/cores/liteethmini/mac/core/__init__.py similarity index 100% rename from misoc/liteethmini/mac/core/__init__.py rename to misoc/cores/liteethmini/mac/core/__init__.py diff --git a/misoc/liteethmini/mac/core/crc.py b/misoc/cores/liteethmini/mac/core/crc.py similarity index 100% rename from misoc/liteethmini/mac/core/crc.py rename to misoc/cores/liteethmini/mac/core/crc.py diff --git a/misoc/liteethmini/mac/core/gap.py b/misoc/cores/liteethmini/mac/core/gap.py similarity index 100% rename from misoc/liteethmini/mac/core/gap.py rename to misoc/cores/liteethmini/mac/core/gap.py diff --git a/misoc/liteethmini/mac/core/last_be.py b/misoc/cores/liteethmini/mac/core/last_be.py similarity index 100% rename from misoc/liteethmini/mac/core/last_be.py rename to misoc/cores/liteethmini/mac/core/last_be.py diff --git a/misoc/liteethmini/mac/core/padding.py b/misoc/cores/liteethmini/mac/core/padding.py similarity index 100% rename from misoc/liteethmini/mac/core/padding.py rename to misoc/cores/liteethmini/mac/core/padding.py diff --git a/misoc/liteethmini/mac/core/preamble.py b/misoc/cores/liteethmini/mac/core/preamble.py similarity index 100% rename from misoc/liteethmini/mac/core/preamble.py rename to misoc/cores/liteethmini/mac/core/preamble.py diff --git a/misoc/mem/sdram/frontend/__init__.py b/misoc/cores/liteethmini/mac/frontend/__init__.py similarity index 100% rename from misoc/mem/sdram/frontend/__init__.py rename to misoc/cores/liteethmini/mac/frontend/__init__.py diff --git a/misoc/liteethmini/mac/frontend/sram.py b/misoc/cores/liteethmini/mac/frontend/sram.py similarity index 100% rename from misoc/liteethmini/mac/frontend/sram.py rename to misoc/cores/liteethmini/mac/frontend/sram.py diff --git a/misoc/liteethmini/mac/frontend/wishbone.py b/misoc/cores/liteethmini/mac/frontend/wishbone.py similarity index 100% rename from misoc/liteethmini/mac/frontend/wishbone.py rename to misoc/cores/liteethmini/mac/frontend/wishbone.py diff --git a/misoc/liteethmini/phy/__init__.py b/misoc/cores/liteethmini/phy/__init__.py similarity index 100% rename from misoc/liteethmini/phy/__init__.py rename to misoc/cores/liteethmini/phy/__init__.py diff --git a/misoc/liteethmini/phy/gmii.py b/misoc/cores/liteethmini/phy/gmii.py similarity index 100% rename from misoc/liteethmini/phy/gmii.py rename to misoc/cores/liteethmini/phy/gmii.py diff --git a/misoc/liteethmini/phy/gmii_mii.py b/misoc/cores/liteethmini/phy/gmii_mii.py similarity index 100% rename from misoc/liteethmini/phy/gmii_mii.py rename to misoc/cores/liteethmini/phy/gmii_mii.py diff --git a/misoc/liteethmini/phy/loopback.py b/misoc/cores/liteethmini/phy/loopback.py similarity index 100% rename from misoc/liteethmini/phy/loopback.py rename to misoc/cores/liteethmini/phy/loopback.py diff --git a/misoc/liteethmini/phy/mii.py b/misoc/cores/liteethmini/phy/mii.py similarity index 100% rename from misoc/liteethmini/phy/mii.py rename to misoc/cores/liteethmini/phy/mii.py diff --git a/misoc/liteethmini/phy/s6rgmii.py b/misoc/cores/liteethmini/phy/s6rgmii.py similarity index 100% rename from misoc/liteethmini/phy/s6rgmii.py rename to misoc/cores/liteethmini/phy/s6rgmii.py diff --git a/misoc/liteethmini/phy/sim.py b/misoc/cores/liteethmini/phy/sim.py similarity index 100% rename from misoc/liteethmini/phy/sim.py rename to misoc/cores/liteethmini/phy/sim.py diff --git a/misoc/lm32/core.py b/misoc/cores/lm32/core.py similarity index 100% rename from misoc/lm32/core.py rename to misoc/cores/lm32/core.py diff --git a/misoc/lm32/verilog/lm32_config.v b/misoc/cores/lm32/verilog/lm32_config.v similarity index 100% rename from misoc/lm32/verilog/lm32_config.v rename to misoc/cores/lm32/verilog/lm32_config.v diff --git a/misoc/mem/sdram/phy/__init__.py b/misoc/cores/mor1kx/__init__.py similarity index 100% rename from misoc/mem/sdram/phy/__init__.py rename to misoc/cores/mor1kx/__init__.py diff --git a/misoc/mor1kx/core.py b/misoc/cores/mor1kx/core.py similarity index 100% rename from misoc/mor1kx/core.py rename to misoc/cores/mor1kx/core.py diff --git a/misoc/mxcrg.v b/misoc/cores/mxcrg.v similarity index 100% rename from misoc/mxcrg.v rename to misoc/cores/mxcrg.v diff --git a/misoc/norflash16.py b/misoc/cores/norflash16.py similarity index 100% rename from misoc/norflash16.py rename to misoc/cores/norflash16.py diff --git a/misoc/mem/sdram/__init__.py b/misoc/cores/sdram/__init__.py similarity index 100% rename from misoc/mem/sdram/__init__.py rename to misoc/cores/sdram/__init__.py diff --git a/misoc/mem/sdram/core/__init__.py b/misoc/cores/sdram/core/__init__.py similarity index 100% rename from misoc/mem/sdram/core/__init__.py rename to misoc/cores/sdram/core/__init__.py diff --git a/misoc/mem/sdram/core/lasmibus.py b/misoc/cores/sdram/core/lasmibus.py similarity index 100% rename from misoc/mem/sdram/core/lasmibus.py rename to misoc/cores/sdram/core/lasmibus.py diff --git a/misoc/mem/sdram/core/lasmicon/__init__.py b/misoc/cores/sdram/core/lasmicon/__init__.py similarity index 100% rename from misoc/mem/sdram/core/lasmicon/__init__.py rename to misoc/cores/sdram/core/lasmicon/__init__.py diff --git a/misoc/mem/sdram/core/lasmicon/bankmachine.py b/misoc/cores/sdram/core/lasmicon/bankmachine.py similarity index 100% rename from misoc/mem/sdram/core/lasmicon/bankmachine.py rename to misoc/cores/sdram/core/lasmicon/bankmachine.py diff --git a/misoc/mem/sdram/core/lasmicon/multiplexer.py b/misoc/cores/sdram/core/lasmicon/multiplexer.py similarity index 100% rename from misoc/mem/sdram/core/lasmicon/multiplexer.py rename to misoc/cores/sdram/core/lasmicon/multiplexer.py diff --git a/misoc/mem/sdram/core/lasmicon/perf.py b/misoc/cores/sdram/core/lasmicon/perf.py similarity index 100% rename from misoc/mem/sdram/core/lasmicon/perf.py rename to misoc/cores/sdram/core/lasmicon/perf.py diff --git a/misoc/mem/sdram/core/lasmicon/refresher.py b/misoc/cores/sdram/core/lasmicon/refresher.py similarity index 100% rename from misoc/mem/sdram/core/lasmicon/refresher.py rename to misoc/cores/sdram/core/lasmicon/refresher.py diff --git a/misoc/mem/sdram/core/lasmixbar.py b/misoc/cores/sdram/core/lasmixbar.py similarity index 100% rename from misoc/mem/sdram/core/lasmixbar.py rename to misoc/cores/sdram/core/lasmixbar.py diff --git a/misoc/mem/sdram/core/minicon/__init__.py b/misoc/cores/sdram/core/minicon/__init__.py similarity index 100% rename from misoc/mem/sdram/core/minicon/__init__.py rename to misoc/cores/sdram/core/minicon/__init__.py diff --git a/misoc/mor1kx/__init__.py b/misoc/cores/sdram/frontend/__init__.py similarity index 100% rename from misoc/mor1kx/__init__.py rename to misoc/cores/sdram/frontend/__init__.py diff --git a/misoc/mem/sdram/frontend/dma_lasmi.py b/misoc/cores/sdram/frontend/dma_lasmi.py similarity index 100% rename from misoc/mem/sdram/frontend/dma_lasmi.py rename to misoc/cores/sdram/frontend/dma_lasmi.py diff --git a/misoc/mem/sdram/frontend/memtest.py b/misoc/cores/sdram/frontend/memtest.py similarity index 100% rename from misoc/mem/sdram/frontend/memtest.py rename to misoc/cores/sdram/frontend/memtest.py diff --git a/misoc/mem/sdram/frontend/wishbone2lasmi.py b/misoc/cores/sdram/frontend/wishbone2lasmi.py similarity index 100% rename from misoc/mem/sdram/frontend/wishbone2lasmi.py rename to misoc/cores/sdram/frontend/wishbone2lasmi.py diff --git a/misoc/mem/sdram/module.py b/misoc/cores/sdram/module.py similarity index 100% rename from misoc/mem/sdram/module.py rename to misoc/cores/sdram/module.py diff --git a/misoc/cores/sdram/phy/__init__.py b/misoc/cores/sdram/phy/__init__.py new file mode 100644 index 000000000..e69de29bb diff --git a/misoc/mem/sdram/phy/dfi.py b/misoc/cores/sdram/phy/dfi.py similarity index 100% rename from misoc/mem/sdram/phy/dfi.py rename to misoc/cores/sdram/phy/dfi.py diff --git a/misoc/mem/sdram/phy/dfii.py b/misoc/cores/sdram/phy/dfii.py similarity index 100% rename from misoc/mem/sdram/phy/dfii.py rename to misoc/cores/sdram/phy/dfii.py diff --git a/misoc/mem/sdram/phy/gensdrphy.py b/misoc/cores/sdram/phy/gensdrphy.py similarity index 100% rename from misoc/mem/sdram/phy/gensdrphy.py rename to misoc/cores/sdram/phy/gensdrphy.py diff --git a/misoc/mem/sdram/phy/initsequence.py b/misoc/cores/sdram/phy/initsequence.py similarity index 100% rename from misoc/mem/sdram/phy/initsequence.py rename to misoc/cores/sdram/phy/initsequence.py diff --git a/misoc/mem/sdram/phy/k7ddrphy.py b/misoc/cores/sdram/phy/k7ddrphy.py similarity index 100% rename from misoc/mem/sdram/phy/k7ddrphy.py rename to misoc/cores/sdram/phy/k7ddrphy.py diff --git a/misoc/mem/sdram/phy/s6ddrphy.py b/misoc/cores/sdram/phy/s6ddrphy.py similarity index 100% rename from misoc/mem/sdram/phy/s6ddrphy.py rename to misoc/cores/sdram/phy/s6ddrphy.py diff --git a/misoc/mem/sdram/phy/simphy.py b/misoc/cores/sdram/phy/simphy.py similarity index 100% rename from misoc/mem/sdram/phy/simphy.py rename to misoc/cores/sdram/phy/simphy.py diff --git a/misoc/mem/sdram/test/abstract_transactions_lasmi.py b/misoc/cores/sdram/test/abstract_transactions_lasmi.py similarity index 100% rename from misoc/mem/sdram/test/abstract_transactions_lasmi.py rename to misoc/cores/sdram/test/abstract_transactions_lasmi.py diff --git a/misoc/mem/sdram/test/bankmachine_tb.py b/misoc/cores/sdram/test/bankmachine_tb.py similarity index 100% rename from misoc/mem/sdram/test/bankmachine_tb.py rename to misoc/cores/sdram/test/bankmachine_tb.py diff --git a/misoc/mem/sdram/test/common.py b/misoc/cores/sdram/test/common.py similarity index 100% rename from misoc/mem/sdram/test/common.py rename to misoc/cores/sdram/test/common.py diff --git a/misoc/mem/sdram/test/lasmicon_df_tb.py b/misoc/cores/sdram/test/lasmicon_df_tb.py similarity index 100% rename from misoc/mem/sdram/test/lasmicon_df_tb.py rename to misoc/cores/sdram/test/lasmicon_df_tb.py diff --git a/misoc/mem/sdram/test/lasmicon_tb.py b/misoc/cores/sdram/test/lasmicon_tb.py similarity index 100% rename from misoc/mem/sdram/test/lasmicon_tb.py rename to misoc/cores/sdram/test/lasmicon_tb.py diff --git a/misoc/mem/sdram/test/lasmicon_wb.py b/misoc/cores/sdram/test/lasmicon_wb.py similarity index 100% rename from misoc/mem/sdram/test/lasmicon_wb.py rename to misoc/cores/sdram/test/lasmicon_wb.py diff --git a/misoc/mem/sdram/test/minicon_tb.py b/misoc/cores/sdram/test/minicon_tb.py similarity index 100% rename from misoc/mem/sdram/test/minicon_tb.py rename to misoc/cores/sdram/test/minicon_tb.py diff --git a/misoc/mem/sdram/test/refresher.py b/misoc/cores/sdram/test/refresher.py similarity index 100% rename from misoc/mem/sdram/test/refresher.py rename to misoc/cores/sdram/test/refresher.py diff --git a/misoc/spi/__init__.py b/misoc/cores/spi/__init__.py similarity index 100% rename from misoc/spi/__init__.py rename to misoc/cores/spi/__init__.py diff --git a/misoc/spi/core.py b/misoc/cores/spi/core.py similarity index 100% rename from misoc/spi/core.py rename to misoc/cores/spi/core.py diff --git a/misoc/spi/test.py b/misoc/cores/spi/test.py similarity index 100% rename from misoc/spi/test.py rename to misoc/cores/spi/test.py diff --git a/misoc/spiflash.py b/misoc/cores/spiflash.py similarity index 100% rename from misoc/spiflash.py rename to misoc/cores/spiflash.py diff --git a/misoc/timer.py b/misoc/cores/timer.py similarity index 100% rename from misoc/timer.py rename to misoc/cores/timer.py diff --git a/misoc/uart/__init__.py b/misoc/cores/uart/__init__.py similarity index 100% rename from misoc/uart/__init__.py rename to misoc/cores/uart/__init__.py diff --git a/misoc/uart/core.py b/misoc/cores/uart/core.py similarity index 100% rename from misoc/uart/core.py rename to misoc/cores/uart/core.py diff --git a/misoc/uart/test.py b/misoc/cores/uart/test.py similarity index 100% rename from misoc/uart/test.py rename to misoc/cores/uart/test.py