From 10146abf0ae4d6d323b1997cb953ad6283168717 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Wed, 9 Oct 2019 10:24:01 +0200
Subject: [PATCH] cpu/rocket: move csr to IO region

---
 litex/soc/cores/cpu/rocket/core.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/litex/soc/cores/cpu/rocket/core.py b/litex/soc/cores/cpu/rocket/core.py
index 4f46ae2b2..54c31596c 100644
--- a/litex/soc/cores/cpu/rocket/core.py
+++ b/litex/soc/cores/cpu/rocket/core.py
@@ -64,7 +64,7 @@ class RocketRV64(CPU):
         return {
             "rom"  : 0x10000000,
             "sram" : 0x11000000,
-            "csr"  : 0x12000000,
+            "csr"  : 0x92000000,
         }
 
     @property